International Journal and Conferences

International Journal

1. G. Hu, S. Hu, R. Liu, L. Wang, X. Zhou, and T.-A. Tang, "Quasi-Ballistic Transport Model for Graphene Field-Effect Transistor," IEEE Trans. Electron Devices, Vol. 60, No. 7, pp. 2410-2414, Jul. 2013. 

 
2. S. B. Chiah, X. Zhou, and L. Yuan, "Compact Zero-Temperature Coefficient Modeling Approach for MOSFETs Based on Unified Regional Modeling of Surface Potential," IEEE Trans. Electron Devices, Vol. 60, No. 7, pp. 2164-2170, Jul. 2013. 

 
3. T. T. Le, H. Y. Yu, Y. Sun, N. Singh, X. Zhou, N. Shen, G. Q. Lo, and D. L. Kwong, "High Performance Poly-Si Vertical Nanowire Thin Film Transistor and the Inverter Demonstration," IEEE Electron Device Lett., Vol. 32, No. 6, pp. 770-772, Jun. 2011.

 
4. X. Zhou, G. Zhu, G. H. See, K. Chandrasekaran, S. B. Chiah, and K. Y. Lim, "Unification of MOS compact models with the unified regional modeling approach," (Invited Paper), Journal of Computational Electronics, Vol. 10, No. 1, pp. 121-135, 2011. 

 
5. C. Q. Wei, Y.-Z. Xiong, X. Zhou, N. Singh, X.-J. Yuan, G. Q. Lo, L. Chan, and D.-L. Kwong, "Comparative Study of 1/f Noise Degradation Caused by Fowler–Nordheim Tunneling Stress in Silicon Nanowire Transistors and FinFETs," IEEE Trans. Electron Devices, Vol. 57, No. 10, pp. 2774-2779, October 2010. 

 
6. W. Chandra, L. K. Ang, and X. Zhou, “Shot noise reduction of space charge limited electron injection through a Schottky contact,” Phys. Rev. B, Vol. 81, No. 12, 125321, 2010.

 
7. C. Q. Wei, Y.-Z. Xiong, and X. Zhou, "Test Structure for Characterization of Low-Frequency Noise in CMOS Technologies," IEEE Trans. Instr. Meas., Vol. 57, No. 7, pp. 1860-1865, July 2010.

 
8. G. J. Zhu, X. Zhou, Y. K. Chin, K. L. Pey, J. B. Zhang, G. H. See, S. H. Lin, Y. F. Yan, and Z. H. Chen, "Subcircuit Compact Model for Dopant-Segregated Schottky Gate-All-Around Si-Nanowire MOSFETs," IEEE Trans. Electron Devices, Vol. 57, No. 4, pp. 772-781, Apr. 2010. 

 
9. Z. H. Chen, X. Zhou, and G. J. Zhu, “Effects of Translational Layer of Gate Insulator on Recombination DC Current-Voltage Lineshape in Metal-Oxide-Silicon Transistors,” Jpn. J. Appl. Phys., Vol. 48, No. 9, 091403, 2009.

 
10. C. Q. Wei, Y.-Z. Xiong, X. Zhou, "Investigation of Low-Frequency Noise in N-Channel FinFETs From Weak to Strong Inversion," IEEE Trans. Electron Devices, Vol. 56, No. 11, pp. 2800-2810, Nov. 2009. 

 
11. C. Q. Wei, Y. Jiang, Y.-Z. Xiong, X. Zhou, N. Singh, S. C. Rustagi, G. Q. Lo, and D.-L. Kwong, "Impact of Gate Electrode on 1/f Noise of Gate-All-Around Silicon Nanowire Transistors," IEEE Electron Device Lett., Vol. 30, No. 10, pp. 1081-1083, Oct. 2009. 

 
12. C. Q. Wei, Y.-Z. Xiong, X. Zhou, N. Singh, S. C. Rustagi, G. Q. Lo, and D.-L. Kwong, "Investigation of Low-Frequency Noise in Silicon Nanowire MOSFETs in the Subthreshold Region," IEEE Electron Device Lett., Vol. 30, No. 6, pp. 668-671, Jun. 2009. 

 
13. X.-F. Wang, L.-N. Zhao, Z.-H. Yao, Z.-F. Hou, M. Yee, X. Zhou, S.-H. Lin, and T.-S. Lee, "Atomistic Simulation of Gate Effect on Nanoscale Intrinsic Si Field-Effect Transistors," Int. J. Nanosci., Vol. 8, No. 1 & 2, pp. 113-117, 2009.

 
14. G. J. Zhu, X. Zhou, T. S. Lee, L. K. Ang, G. H. See, S. H. Lin, Y. K. Chin, and K. L. Pey, "A Compact Model for Undoped Silicon-Nanowire MOSFETs with Schottky-Barrier Source/Drain," IEEE Trans. Electron Devices, Vol. 56, No. 5, pp. 1100-1109, May 2009. 

 
15. L.-N. Zhao, X.-F. Wang, Z.-H. Yao, Z.-F. Hou, M. Yee, X. Zhou, S.-H. Lin, and T.-S. Lee, "Atomistic modeling of the electrostatic and transport properties of a simplified nanoscale field effect transistor," J. Comput. Electron., Vol. 7, No. 4, pp. 500-508, Dec. 2008.

 
16. G. J. Zhu, G. H. See, S. H. Lin, and X. Zhou, "“Ground-Referenced” Model for Three-Terminal Symmetric Double-Gate MOSFETs with Source/Drain Symmetry," IEEE Trans. Electron Devices, Vol. 55, No. 9, pp. 2526-2530, Sep. 2008. 

 
17. C. Q. Wei, G. H. See, X. Zhou, and L. Chan, "A New Impact-Ionization Current Model Applicable to Both Bulk and SOI MOSFETs by Considering Self-Lattice-Heating," IEEE Trans. Electron Devices, Vol. 55, No. 9, pp. 2378-2385, Sep. 2008. 

 
18. G. H. See, X. Zhou, K. Chandrasekaran, S. B. Chiah, Z. M. Zhu, C. Q. Wei, S. H. Lin, G. J. Zhu, and G. H. Lim, "A Compact Model Satisfying Gummel Symmetry in Higher Order Derivatives and Applicable to Asymmetric MOSFETs," IEEE Trans. Electron Devices, Vol. 55, No. 2, pp. 624-631, Feb. 2008. 

 
19. X. Zhou, Z. M. Zhu, S. C. Rustagi, G. H. See, G. J. Zhu, S. H. Lin, C. Q. Wei, and G. H. Lim, "Rigorous Surface-Potential Solution for Undoped Symmetric Double-Gate MOSFETs Considering Both Electrons and Holes at Quasi Nonequilibrium," IEEE Trans. Electron Devices, Vol. 55, No. 2, pp. 616-623, Feb. 2008. 

 
20. Z. Zhu, X. Zhou, S. C. Rustagi, G. H. See, S. Lin, G. Zhu, C. Wei, and J. Zhang, "Analytic and explicit current model of undoped double-gate MOSFETs," Electron. Lett., Vol. 43, No. 25, pp. 1464-1466, Dec. 2007.

 
21. Z. M. Zhu, X. Zhou, K. Chandrasekaran, S. C. Rustagi, and G. H. See, "Explicit compact surface-potential and drain-current models for generic asymmetric double-gate MOSFETs," Jpn. J. Appl. Phys., Vol. 46, No. 4B, pp. 2067-2072, Apr. 2007. 

 
22. W. Z. Shangguan, T. C. Au Yeung, Z. M. Zhu, and X. Zhou, "General analytical Poisson solution for undoped generic two-gated metal-oxide-semiconductor field-effect transistors," Appl. Phys. Lett., Vol. 90, No. 1, 012110, Jan. 2007. 

 
23. W. Z. Shangguan, X. Zhou, K. Chandrasekaran, Z. M. Zhu, S. C. Rustagi, S. B. Chiah, and G. H. See, "Surface-potential Solution for Generic Undoped MOSFETs with Two Gates," IEEE Trans. Electron Devices, Vol. 54, No. 1, pp. 169-172, Jan. 2007. 

 
24. K. Chandrasekaran, X. Zhou, S. B. Chiah, G. H. See, and S. C. Rustagi, "Implicit Analytical Surface/Interface Potential Solutions for Modeling Strained-Si MOSFETs," IEEE Trans. Electron Devices, Vol. 53, No. 12, pp. 3110-3117, Dec. 2006. 

 
25. W. Z. Shangguan, M. Saeys, and X. Zhou, "Surface-potential solutions to the Pao-Sah voltage equation," Solid-State Electron., Vol. 50, No. 7-8, pp. 1320-1329, July-August 2006. 

 
26. K. Chandrasekaran, X. Zhou, S. B. Chiah, W. Z. Shangguan, and G. H. See, L. K. Bera, N. Balasubramanian, and S. C. Rustagi, "Effect of Substrate Doping on the Capacitance–Voltage Characteristics of Strained-silicon pMOSFETs," IEEE Electron Device Lett., Vol. 27, No. 1, pp. 62-64, Jan. 2006. 

 
27. K. Chandrasekaran, X. Zhou, S. B. Chiah, W. Z. Shangguan, and G. H. See, "Physics-based Single-piece Charge Model for Strained-Si MOSFETs," IEEE Trans. Electron Devices, Vol. 52, No. 7, pp. 1555-1562, Jul. 2005. 

 
28. W. Z. Shangguan, X. Zhou, S. B. Chiah, G. H. See, and K. Chandrasekaran, "Compact gate-current model based on transfer-matrix method," J. Appl. Phys., Vol. 97, 123709, 15 Jun. 2005. 

 
29. S. B. Chiah, X. Zhou, K. Chandrasekaran, W. Z. Shangguan, G. H. See, and S. M. Pandey, "Single-piece polycrystalline silicon accumulation/depletion/inversion model with implicit/explicit surface-potential solutions," Appl. Phys. Lett., Vol. 86, No. 20, 202111, May 2005. 

 
30. X. Zhou, S. B. Chiah, and K. Y. Lim, "A compact deep-submicron MOSFET g_ds model including hot-electron and thermoelectric effects," Solid-State Electron., Vol. 48, No. 12, pp. 2125-2131, Dec. 2004.  

 
31. S. B. Chiah, X. Zhou, K. Y. Lim, L. Chan, and S. Chu, "Source-Drain Symmetry in Unified Regional MOSFET Model," IEEE Electron Device Lett., Vol. 25, No. 5, pp. 311-313, May 2004. 

 
32. X. Zhou, "The Missing Link to Seamless Simulation," (Invited Feature Article), IEEE Circuits Devices Mag., Vol. 19, No. 3, pp. 9-17, May 2003. 

 
33. K. Y. Lim and X. Zhou, "An analytical effective channel-length modulation model for velocity overshoot in submicron MOSFETs based on energy-balance formulation," Microelectronics Reliability, Vol. 42, No. 12, pp. 1857-1864, Dec. 2002.  

 
34. X. Zhou and K. Y. Lim, "De-embedding Length-Dependent Edge-Leakage Current in Shallow Trench Isolation Submicron MOSFETs," Solid-State Electron., Vol. 46, No. 5, pp. 769-772, May 2002.  

 
35. K. Y. Lim and X. Zhou, "MOSFET Subthreshold Compact Modeling with Effective Gate Overdrive," IEEE Trans. Electron Devices, Vol. 49, No. 1, pp. 196-199, Jan. 2002.  

 
36. X. Zhou and K. Y. Lim, "Unified MOSFET Compact I-V Model Formulation through Physics-Based Effective Transformation," IEEE Trans. Electron Devices, Vol. 48, No. 5, pp. 887-896, May 2001.  

 
37. X. Zhou, K. Y. Lim, and W. Qian, "Threshold Voltage Definition and Extraction for Deep-Submicron MOSFETs," Solid-State Electron., Vol. 45, No. 3, pp. 507-510, Apr. 2001.  

 
38. K. Y. Lim and X. Zhou, "A Physically-Based Semi-Empirical Effective Mobility Model for MOSFET Compact I-V Modeling," Solid-State Electron., Vol. 45, No. 1, pp. 193-197, Jan. 2001.  

 
39. K. Y. Lim and X. Zhou, "A Physically-Based Semi-Empirical Series Resistance Model for Deep-Submicron MOSFET I-V Modeling," IEEE Trans. Electron Devices, Vol. 47, No. 6, pp. 1300-1302, Jun. 2000.  

 
40. X. Zhou, "Exploring the Novel Characteristics of Hetero-Material Gate Field-Effect Transistors (HMGFET's) with Gate-Material Engineering," IEEE Trans. Electron Devices, Vol. 47, No. 1, pp. 113-120, Jan. 2000.  

 
41. X. Zhou, K. Y. Lim, and D. Lim, "A General Approach to Compact Threshold Voltage Formulation Based on 2-D Numerical Simulation and Experimental Correlation for Deep-Submicron ULSI Technology Development," IEEE Trans. Electron Devices, Vol. 47, No. 1, pp. 214-221, Jan. 2000.  

 
42. X. Zhou, K. Y. Lim, and D. Lim, "A New 'Critical-Current at Linear-Threshold' Method for Direct Extraction of Deep-Submicron MOSFET Effective Channel Length," IEEE Trans. Electron Devices, Vol. 46, No. 7, pp. 1492-1494, Jul. 1999.  

 
43. X. Zhou, K. Y. Lim, and D. Lim, "A Simple and Unambiguous Definition of Threshold Voltage and Its Implications in Deep-Submicron MOS Device Modeling," IEEE Trans. Electron Devices, Vol. 46, No. 4, pp. 807-809, Apr. 1999.  

 
44. X. Zhou and W. Long, "A Novel Hetero-Material Gate (HMG) MOSFET for Deep-Submicron ULSI Technology," IEEE Trans. Electron Devices, Vol. 45, No. 12, pp. 2546-2548, Dec. 1998.  

 
45. X. Zhou, T. Tang, L. S. Seah, C. J. Yap, and S. C. Choo, "Numerical Investigation of Subpicosecond Electrical Pulse Generation by Edge Illumination of Silicon Transmission-Line Gaps," IEEE J. Quantum Electron., Vol. 34, No. 1, pp. 171-178, Jan. 1998.  

 
46. X. Zhou, "Numerical Physics of Subpicosecond Electrical Pulse Generation by Nonuniform Gap Illumination," IEEE J. Quantum Electron., Vol. 32, No. 9, pp. 1672-1679, Sep. 1996.  

 
47. X. Zhou, "On the Physics of Femto-second Electrical Pulse Generation by Nonuniform Gap Illumination," OPTOELECTRONICS--Devices and Technologies, Vol. 10, No. 4, pp. 491-504, Dec. 1995.

 
48. X. Zhou and H. S. Tan, "Monte Carlo Formulation of Field-Dependent Mobility for Al_xGa_1-xAs," Solid-State Electron., Vol. 38, No. 6, pp. 1264-1266, Jun. 1995.  

 
49. X. Zhou, S. Alexandrou, and T. Y. Hsiang, "Monte Carlo investigation of the intrinsic mechanism of subpicosecond pulse generation by nonuniform gap illumination," J. Appl. Phys., Vol. 77, No. 2, pp. 706-711, Jan. 1995.  

 
50. X. Zhou, "Electron Transport in Graded-Band Devices: Interplay of Field, Composition and Length Dependencies," Solid-State Electron., Vol. 37, No. 11, pp. 1888-1890, Nov. 1994. 

 
51. X. Zhou and H. S. Tan, "Monte Carlo formulation of velocity-field characteristics and expressions for Al_xGa_1-xAs," Int. J. Electron., Vol. 76, No. 6, pp. 1049-1062, Jun. 1994.

 
52. X. Zhou, "Regional Monte Carlo Modeling of Electron Transport and Transit-Time Estimation in Graded-Base HBT's," IEEE Trans. Electron Devices, Vol. 41, No. 4, pp. 484-490, Apr. 1994.  

 
53. X. Zhou and T. Y. Hsiang, "Monte Carlo determination of femtosecond dynamics of hot-carrier relaxation and scattering processes in bulk GaAs," J. Appl. Phys., Vol. 67, No. 12, pp. 7399-7403, Jun. 1990.  

 
54. X. Zhou, T. Y. Hsiang, and R. J. Dwayne Miller, "Monte Carlo study of photogenerated carrier transport in GaAs surface space-charge fields," J. Appl. Phys., Vol. 66, No. 7, pp. 3066-3073, Oct. 1989.  

International Conference

1. H. T. Zhou, X. Zhou, and F. Benistant, "An Explicit Compact Model for High-Voltage LDMOS," International Conference on Solid State Devices and Materials (SSDM2013), Fukuoka, Japan, Sep. 2013, Poster PS-14-4.

 
2. X. Zhou, J. B. Zhang, B. Syamal, Z. M. Zhu, H. T. Zhou, and S. B. Chiah, "Top-down Drift-diffusion versus Bottom-up Quasi-ballistic Formalism in Device Compact Modeling," (Keynote), Proc. of the 20th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES2013), Gdynia, Poland, Jun. 2013, p. 53.

 
3. X. Zhou, J. B. Zhang, B. Syamal, Z. M. Zhu, and L. Yuan, "A Scalable Compact Model for Generic HEMTs in III-V/Si Co-integrated Hybrid Design," (Invited Paper), Proc. of the 9th International Conference on Electron Devices and Solid State Circuits (EDSSC2013), Hong Kong, Jun. 2013, paper 299.

 
4. X. Zhou, J. B. Zhang, B. Syamal, S. B. Chiah, H. T. Zhou, and L. Yuan, "Unified Regional Modeling of GaN HEMTs with the 2DEG and DD Formalism," (Invited Paper), Proc. of the 11th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT2012), Xi'an, China, Oct. 2012, paper S21_01.

 
5. X. Zhou, S. B. Chiah, and L. Yuan, "A Simplified Model for Dynamic Depletion in Doped UTB-SOI/DG-FinFETs," (Invited Paper), Proc. of the NSTI Nanotech (WCM-Nanotech2012), Santa Clara, CA, Jun. 2012, vol. 2, pp. 784-787.

 
6. S. B. Chiah, X. Zhou, Z. H. Chen, H. M. Chen, and L. Yuan, "Unified Regional Approach to High Temperature SOI DC/AC Modeling," Proc. of the NSTI Nanotech (WCM-Nanotech2012), Santa Clara, CA, Jun. 2012, vol. 2, pp. 796-799.

 
7. J. B. Zhang and X. Zhou, "An Analytical 2DEG Model Considering the Two Lowest Subbands," Proc. of the NSTI Nanotech (WCM-Nanotech2012), Santa Clara, CA, Jun. 2012, vol. 2, pp. 734-737.

 
8. X. Zhou, "Physics-Based Compact Variability/Reliability Modeling for Emerging Double-Gate/Nanowire MOSFETs," (Invited Talk), 2011 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC2011), Tianjin, China, Nov. 17, 2011.

 
9. X. Zhou, "Xsim: A Unified Compact Model for Bulk/SOI/DG/GAA MOSFETs," (Invited Paper), Proc. Nanotech (WCM-Nanotech2011), Boston, MA, Jun. 2011, vol. 2, pp. 726-731.

 
10. J. B. Zhang, X. Zhou, G. J. Zhu, and S. H. Lin, "Charge Partition in Lateral Nonuniformly-Doped Transistor," Proc. Nanotech (WCM-Nanotech2011), Boston, MA, Jun. 2011, vol. 2, pp. 784-787.

 
11. S. H. Lin, X. Zhou, Z. H. Chen, M. K. Srikanth, and J. B. Zhang, "Hot-Carrier-Induced Current Degradation in Deep Sub-Micron MOSFETs from Subthreshold to Strong Inversion Region," Proc. Nanotech (WCM-Nanotech2011), Boston, MA, Jun. 2011, vol. 2, pp. 806-809.

 
12. Z. H. Chen, X. Zhou, Y. Z. Hu, and M. K. Srikanth, "Neutral Interface Traps for Negative Bias Temperature Instability," Proc. of the 2011 IEEE Reliability Physics Symposium (IRPS2011), Monterey, CA, Apr. 2011, pp. 913-914.

 
13. X. Zhou, "Challenges and Trends in Unified Compact Modeling of Conventional (Bulk/SOI) and Emerging (Multigate/Nanowire) MOSFETs," (Keynote), International Symposium on Next-Generation Electronics (ISNE2010), Kaohsiung, Taiwan, Nov. 2010, pp. 1-2.

 
14. X. Zhou, G. J. Zhu, M. K. Srikanth, S. H. Lin, Z. H. Chen, J. B. Zhang, and C. Q. Wei, "A Unified Compact Model for Emerging DG FinFETs and GAA Nanowire MOSFETs Including Long/Short-Channel and Thin/Thick-Body Effects," (Invited Paper), Proc. of the 10th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT2010), Shanghai, China, Nov. 2010, pp. 1725-1728.

 
15. X. Zhou, G. J. Zhu, M. K. Srikanth, S. H. Lin, Z. H. Chen, J. B. Zhang, C. Q. Wei, Y. F. Yan, R. Selvakumar, and Z. H. Wang, "Xsim: Benchmark Tests for the Unified DG/GAA MOSFET Compact Model," Proc. of the NSTI Nanotech 2010 (WCM-Nanotech2010), Anaheim, CA, Jun. 2010, Vol. 2, pp. 785-788.

 
16. Z. H. Chen, X. Zhou, G. J. Zhu, and S. H. Lin, "Interface-Trap Modeling for Silicon-Nanowire MOSFETs," Proc. of the 2010 IEEE Reliability Physics Symposium (IRPS2010), Anaheim, CA, May 2010, pp. 977-980.

 
17. Z. H. Chen, X. Zhou, G. J. Zhu, and S. H. Lin, "Surface Recombination/Generation Velocity in Metal-Oxide-Silicon Field-Effect Transistors," Proc. of the 2009 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC2009), Xi'an, China, Dec. 2009, paper 6.4.

 
18. Y. K. Chin, K. L. Pey, N. Singh, G. Q. Lo, G. Zhu, X. Zhou, X. C. Wang, H. Y. Zheng, and L. H. Tan, "Excimer Laser-Annealed Dopant Segregated Schottky (ELA-DSS) Si Nanowire Gate-All-Around (GAA) pFET with Near Zero Effective Schottky Barrier Height (SBH)," Tech. Dig. of the 2009 International Electron Devices Meeting (IEDM2009), Baltimore, MD, Dec. 2009, pp. 935-938.

 
19. G. J. Zhu, X. Zhou, Y. K. Chin, K. L. Pey, G. H. See, S. H. Lin, and J. B. Zhang, "Subcircuit Compact Model for Dopant-Segregated Schottky Silicon-Nanowire MOSFETs," Proc. of the 2009 International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, Oct. 2009, pp. 402-403.

 
20. X. Zhou, G. J. Zhu, M. K. Srikanth, R. Selvakumar, Y. F. Yan, W. Chandra, J. B. Zhang, S. H. Lin, C. Q. Wei, and Z. H. Chen, "Compact Model Application to Statistical/Probabilistic Technology Variations," Proc. of the 12th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2009), Houston, TX, May 2009, Vol. 3, pp. 612-615.

 
21. G. J. Zhu, X. Zhou, G. H. See, S. H. Lin, C. Q. Wei, and J. B. Zhang, "A Unified Compact Model for FinFET and Silicon Nanowire MOSFETs," Proc. of the 12th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2009), Houston, TX, May 2009, Vol. 3, pp. 588-591.

 
22. S. H. Lin, X. Zhou, G. H. See, G. J. Zhu, C. Q. Wei, J. B. Zhang, and Z. H. Chen, "A Simple, Accurate Capacitance-Voltage Model of Undoped Silicon Nanowire MOSFETs," Proc. of the 12th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2009), Houston, TX, May 2009, Vol. 3, pp. 643-646.

 
23. C. Q. Wei, Y.-Z. Xiong, and X. Zhou, "1/f Noise Model for Double-Gate FinFET Biased in Weak Inversion," Proc. of the 12th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2009), Houston, TX, May 2009, Vol. 3, pp. 639-642.

 
24. Z. H. Chen, X. Zhou, G. H. See, Z. M. Zhu, and G. J. Zhu, "Interface Traps in Surface-Potential-Based MOSFET Models," Proc. of the 12th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2009), Houston, TX, May 2009, Vol. 3, pp. 542-545.

 
25. X. Zhou, G. H. See, G. J. Zhu, S. H. Lin, C. Q. Wei, and J. B. Zhang, "Unified Regional Modeling Approach to Emerging Multiple-Gate/Nanowire MOSFETs," (Invited Paper), Proc. of the 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT2008), Beijing, China, Oct. 20-23, 2008, Paper B1.2.

 
26. G. J. Zhu, X. Zhou, T. S. Lee, L. K. Ang, G. H. See, and S. H. Lin, "A Compact Model for Undoped Symmetric Double-Gate MOSFETs with Schottky-Barrier Source/Drain," Proc. of the 2008 European Solid-State Device Research Conference (ESSDERC2008), Edinburgh, UK, Sep. 15-19, 2008, pp. 182-185.

 
27. X. Zhou, G. H. See, G. J. Zhu, Z. M. Zhu, S. H. Lin, C. Q. Wei, A. Srinivas, and J. B. Zhang, "New Properties and New Challenges in MOS Compact Modeling," Proc. of the 11th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2008), Boston, MA, Jun. 2-5, 2008, Vol. 3, pp. 750-755.

 
28. G. H. See, X. Zhou, G. Zhu, Z. Zhu, S. Lin, C. Wei, J. Zhang, and A. Srinivas, "Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Any Body Doping," Proc. of the 11th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2008), Boston, MA, Jun. 2-5, 2008, Vol. 3, pp. 770-773.

 
29. G. H. See, X. Zhou, G. Zhu, Z. Zhu, S. Lin, C. Wei, J. Zhang, and A. Srinivas, "Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Quantum Mechanical Correction," Proc. of the 11th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2008), Boston, MA, Jun. 2-5, 2008, Vol. 3, pp. 756-759.

 
30. G. J. Zhu, G. H. See, X. Zhou, Z. M. Zhu, S. H. Lin, C. Q. Wei, J. B. Zhang, and A. Srinivas, "Quasi-2D Surface-Potential Solution to Three-Terminal Undoped Symmetric Double-Gate Schottky-Barrier MOSFETs," Proc. of the 11th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2008), Boston, MA, Jun. 2-5, 2008, Vol. 3, pp. 760-763.

 
31. C. Q. Wei, Y. Z. Xiong, X. Zhou, and L. Chan, "A Technique for Constructing RTS Noise Model Based on Statistical Analysis," Proc. of the 11th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2008), Boston, MA, Jun. 2-5, 2008, Vol. 3, pp. 885-888.

 
32. X. Zhou, G. H. See, G. J. Zhu, Z. M. Zhu, S. H. Lin, C. Q. Wei, A. Srinivas, and J. B. Zhang, "New Challenges in MOS Compact Modeling for Future Generation CMOS," (Invited Paper), Proc. of the 2008 IEEE International Nanoelectronics Conference (INEC2008), Shanghai, China, Mar. 24-28, 2008.

 
33. G. H. Lim, X. Zhou, K. Khu, Y. K. Yoo, F. Poh, G. H. See, Z. M. Zhu, C. Q. Wei, S. H. Lin, and G. J. Zhu, “Physics based scalable MOSFET mismatch model for statistical circuit simulation,” Proc. of the 2007 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC2007), Tainan, Dec. 2007, pp. 1063-1066.

 
34. G. H. Lim, X. Zhou, K. Khu, Y. K. Yoo, F. Poh, G. H. See, Z. M. Zhu, C. Q. Wei, S. H. Lin, and G. J. Zhu, “Impact of BEOL, multi-fingered layout design, and gate protection diode on intrinsic MOSFET threshold voltage mismatch,” Proc. of the 2007 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC2007), Tainan, Dec. 2007, pp. 1059-1062.

 
35. C. Q. Wei, X. Zhou, and G. H. See, “A New Electric-field-driven Impact Ionization Current Model Applicable to Both Bulk and SOI MOSFETs by Considering Self-lattice-heating,” the 2007 International Semiconductor Device Research Symposium (ISDRS2007), College Park, MD, Dec. 2007, pp. 150-151.

 
36. S. H. Lin, X. Zhou, G. H. See1, Z. M. Zhu, G. H. Lim, C. Q. Wei, G. J. Zhu, Z. H., Yao, X. F. Wang, M. Yee, L. N. Zhao, Z. F. Hou, L. K. Ang, T. S. Lee, W. Chandra, “A Rigorous Surface-Potential-Based I-V Model for Undoped Cylindrical Nanowire MOSFETs,” Proc. of the 7th International Conference on Nanotechnology (IEEE-Nano2007), Hong Kong, Aug. 2-5, 2007, Vol. 3, pp. 889-892. 

 
37. X. Zhou, G. H. See, G. J. Zhu, K. Chandrasekaran, Z. M. Zhu, S. Rustagi, S. H. Lin, C. Q. Wei, and G. H. Lim, “Unified Compact Model for Generic Double-Gate MOSFETs,” (Invited Paper), Proc. of the 10th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2007), Santa Clara, CA, May 20-24, 2007, Vol. 3, pp. 538-543.

 
38. G. H. See, X. Zhou, K. Chandrasekaran, S. B. Chiah, Z. Zhu, G. H. Lim, C. Q. Wei, S. H. Lin, and G. J. Zhu, "Gummel Symmetry with Higher-order Derivatives in MOSFET Compact Models," Proc. of the 10th International Conference on Modeling and Simulation of Microsystems (WCM-Nanotech2007), Santa Clara, CA, May 20-24, 2007, Vol. 3, pp. 613-616.

 
39. X. Zhou, K. Chandrasekaran, G. H. See, Z. M. Zhu, G. H. Lim, S. H. Lin, C. Q. Wei, S. B. Chiah, M. Cheng, S. Chu, L.-C. Hsia, and S. Rustagi, "Towards Unification of MOS Compact Models with the Unified Regional Approach," (Invited Paper), Proc. of the 8th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT2006), Shanghai, China, Oct. 23-26, 2006, pp. 1193-1197.

 
40. Z. M. Zhu, X. Zhou, K. Chandrasekaran, G. H. See, and S. C. Rustagi, "A Continuous, Explicit Drain-Current Model for Asymmetric Undoped Double-Gate MOSFETs," Proc. of the 2006 International Conference on Solid State Devices and Materials (SSDM2006), Pacifico Yokohama, Japan, Sep. 12-15, 2006, pp. 1042-1043.

 
41. X. Zhou, K. Chandrasekaran, S. B. Chiah, W. Z. Shangguan, Z. M. Zhu, G. H. See, S. M. Pandey, G. H. Lim, S. Rustagi, M. Cheng, S. Chu, and L.-C. Hsia, "Unified Approach to Bulk/SOI/UTB/s-DG MOSFET Compact Modeling," (Invited Paper),Proc. of the NSTI Nanotech 2006 (WCM-MSM2006), Boston, MA, May 7-11, 2006, Vol. 3, pp. 652-657.  

 
42. G. H. See, S. B. Chiah, X. Zhou, K. Chandrasekaran, W. Z. Shangguan, Z. M. Zhu, G. H. Lim, S. M. Pandey, M. Cheng, S. Chu, and L.-C. Hsia, "Scalable MOSFET Short-channel Charge Model in All Regions," Proc. of the NSTI Nanotech 2006 (WCM-MSM2006), Boston, MA, May 7-11, 2006, Vol. 3, pp. 749-752.   

 
43. K. Chandrasekaran, Z. M. Zhu, X. Zhou, W. Z. Shangguan, G. H. See, S. B. Chiah, S. C. Rustagi, and N. Singh, "Compact Modeling of Doped Symmetric DG MOSFETs with Regional Approach," Proc. of the NSTI Nanotech 2006 (WCM-MSM2006), Boston, MA, May 7-11, 2006, Vol. 3, pp. 792-795.   

 
44. K. Chandrasekaran, X. Zhou, S. B. Chiah, W. Z. Shangguan, G. H. See, L. K. Bera, N. Balasubramanian, S. C. Rustagi, "Extraction of physical parameters of strained-silicon MOSFETs from C-V measurement," Proc. of the 2005 European Solid-State Device Research Conference (ESSDERC2005), Grenoble, France, Sep. 12-16, 2005, pp. 521-524.  

 
45. X. Zhou, S. B. Chiah, K. Chandrasekaran, G. H. See, W. Z. Shangguan, S. M. Pandey, M. Cheng, S. Chu, L.-C. Hsia, "A Compact Model for Future Generation Predictive Technology Modeling and Circuit Simulation," (Invited Paper), Proc. of the 12th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES2005), Kraków, Poland, Jun. 22-25, 2005, pp. 881-886.  

 
46. X. Zhou, S. B. Chiah, K. Chandrasekaran, G. H. See, W. Shangguan, S. M. Pandey, M. Cheng, S. Chu, and L.-C. Hsia, "Unified Regional Charge-based Versus Surface-potential-based Compact Modeling Approaches," (Invited Paper), Proc. of the NSTI Nanotech 2005 (WCM-MSM2005), Anaheim, CA, May 8-12, 2005, Vol. WCM, pp. 25-30.  

 
47. S. B. Chiah, X. Zhou, K. Chandrasekaran, G. H. See, W. Shangguan, S. M. Pandey, M. Cheng, S. Chu, and L.-C. Hsia, "One-iteration Parameter Extraction for Length/width-dependent Threshold Voltage and Unified Drain Current Model," Proc. of the NSTI Nanotech 2005 (WCM-MSM2005), Anaheim, CA, May 8-12, 2005, Vol. WCM, pp. 143-146.   

 
48. G. H. See, S. B. Chiah, X. Zhou, K. Chandrasekaran, W. Shangguan, S. M. Pandey, M. Cheng, S. Chu, and L.-C. Hsia, "Unified Regional Charge-based MOSFET Model Calibration," Proc. of the NSTI Nanotech 2005 (WCM-MSM2005), Anaheim, CA, May 8-12, 2005, Vol. WCM, pp. 147-150.   

 
49. X. Zhou, S. B. Chiah, K. Chandrasekaran, G. H. See, W. Shangguan, S. M. Pandey, C. H. Ang, M. Cheng, S. Chu, and L.-C. Hsia, "Unified Regional Charge Model with Non-pinned Surface Potential," (Invited Paper), Proc. of the 2nd International Workshop on Compact Modeling (IWCM-2005), pp. 13-17, presented at the Asia and South Pacific Design Automation Conference (ASP-DAC2005), Shanghai, January 18-21, 2005.  

 
50. X. Zhou, S. B. Chiah, K. Chandrasekaran, W. Shangguan, G. H. See, C. H. Ang, S. Chu, and L.-C. Hsia, "Xsim: Unified Regional Approach to Compact Modeling for Next Generation CMOS," (Invited Paper), Proc. of the 7th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT-2004), Beijing, October 18-21, 2004, pp. 924-929.  

 
51. X. Zhou, S. B. Chiah, K. Chandrasekaran, K. Y. Lim, L. Chan, and S. Chu, "Unified Regional Approach to Consistent and Symmetric DC/AC Modeling of Deep-Submicron MOSFETs," (Invited Paper), Proc. of the 7th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2004), Boston, MA, March 7-11, 2004, Vol. 2.  

 
52. S. B. Chiah, X. Zhou, K. Chandrasekaran, K. Y. Lim, L. Chan, and S. Chu, "Threshold-Voltage-Based Regional Modeling of MOSFETs with Symmetry and Continuity," Proc. of the 7th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2004), Boston, MA, Mar. 7-11, 2004, Vol. 2, pp. 175-178.  

 
53. K. Chandrasekaran, X. Zhou, and S. B. Chiah, "Physics-Based Scalable Threshold-Voltage Model for Strained-Silicon MOSFETs," Proc. of the 7th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2004), Boston, MA, Mar. 7-11, 2004, Vol. 2, pp. 179-182.  

 
54. X. Zhou, S. B. Chiah, and K. Y. Lim, "A Technology-Based Compact Model for Predictive Deep-Submicron MOSFET Modeling and Characterization," (Invited Paper), Proc. of the 6th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2003), San Francisco, CA, Feb. 23-27, 2003, Vol. 2, pp. 266-269.  

 
55. S. B. Chiah, X. Zhou, and K. Y. Lim, "Unified Length-/Width-Dependent Threshold Voltage Model with Reverse Short-Channel and Inverse Narrow-Width Effects," Proc. of the 6th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2003), San Francisco, CA, February 23-27, 2003, Vol. 2, pp. 338-341.  

 
56. S. B. Chiah, X. Zhou, and K. Y. Lim, "Unified Length-/Width-Dependent Drain Current Model for Deep-Submicron MOSFETs," Proc. of the 6th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2003), San Francisco, CA, Feb. 23-27, 2003, Vol. 2, pp. 342-345.  

 
57. X. Zhou, "Mixed-Signal Multi-Level Circuit Simulation: An Implicit Mixed-Mode Solution," (Invited Plenary Paper), Proc. of the 9th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES2002), Wroclaw, Poland, Jun. 20-22, 2002, pp. 27-31.  

 
58. X. Zhou, "Multi-Level Modeling of Deep-Submicron MOSFETs and ULSI Circuits," (Invited Paper), Proc. of the 9th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES2002), Wroclaw, Poland, Jun. 20-22, 2002, pp. 39-44.  

 
59. X. Zhou, "Xsim: A Compact Model for Bridging Technology Developers and Circuit Designers," (Invited Paper), Proc. of the 5th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2002), San Juan, Puerto Rico, Apr. 22-25, 2002, Vol. 1, pp. 710-714.  

 
60. S. B. Chiah, X. Zhou, K. Y. Lim, A. See, and L. Chan, "Physically-Based Approach to Deep-Submicron MOSFET Compact Model Parameter Extraction," Proc. of the 5th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2002), San Juan, Puerto Rico, Apr. 22-25, 2002, Vol. 1, pp. 750-753.  

 
61. K. Y. Lim and X. Zhou, "Compact Model for Manufacturing Design and Fluctuation Study," Proc. of the 5th International Conference on Modeling and Simulation of Microsystems (WCM-MSM2002), San Juan, Puerto Rico, April 22-25, 2002, Vol. 1, pp. 746-749.  

 
62. X. Zhou, S. B. Chiah, and K. Y. Lim, "A Compact Deep-Submicron MOSFET g_ds Model Including Hot-Electron and Thermoelectric Effects," Proc. of the 2001 International Semiconductor Device Research Symposium (ISDRS-01), Washington DC, Dec. 5-7, 2001, pp. 653-656. 

 
63. X. Zhou, S. B. Chiah, K. Y. Lim, Y. Wang, X. Yu, S. Chwa, A. See, and L. Chan, "Technology-Dependent Modeling of Deep-Submicron MOSFET's and ULSI Circuits," (Invited Paper), Proc. of the 6th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT-2001), Shanghai, Oct. 22-25, 2001, Vol. 2, pp. 855-860.  

 
64. X. Zhou and K. Y. Lim, "Experimental Determination of Electrical, Metallurgical, and Physical Gate Lengths of Submicron MOSFET's," Proc. of the 4th International Conference on Modeling and Simulation of Microsystems (MSM2001), Hilton Head Island, SC, March 19-21, 2001, pp. 44-47.  

 
65. S. B. Chiah, X. Zhou, K. Y. Lim, Y. Wang, A. See, and L. Chan, "Semi-Empirical Approach to Modeling Reverse Short-Channel Effect in Submicron MOSFET's," Proc. of the 4th International Conference on Modeling and Simulation of Microsystems (MSM2001), Hilton Head Island, SC, Mar. 19-21, 2001, pp. 486-489.  

 
66. X. Zhou and K. Y. Lim, "A Novel Approach to Compact I-V Modeling for Deep-Submicron MOSFET's Technology Development with Process Correlation," Proc. of the 3rd International Conference on Modeling and Simulation of Microsystems (MSM2000), San Diego, CA, Mar. 27-29, 2000, pp. 333-336.  

 
67. K. Y. Lim, X. Zhou, and Y. Wang, "Modeling of Threshold Voltage with Reverse Short Channel Effect," Proc. of the 3rd International Conference on Modeling and Simulation of Microsystems (MSM2000), San Diego, CA, Mar. 27-29, 2000, pp. 317-320.  

 
68. W. Qian, X. Zhou, Y. Wang, and K. Y. Lim, "A Velocity-Overshoot Subthreshold Current Model for Deep-Submicrometer MOSFET Devices," Proc. of the 3rd International Conference on Modeling and Simulation of Microsystems  (MSM2000), San Diego, CA, Mar. 27-29, 2000, pp. 396-399. 

 
69. X. Zhou and K. Y. Lim, "A Compact MOSFET I_ds Model for Channel-Length Modulation Including Velocity Overshoot," Proc. of the 1999 International Semiconductor Device Research Symposium (ISDRS-99), Charlottesville, VA, Dec.1-3, 1999, pp. 423-426.  

 
70. K. Y. Lim, X. Zhou, and D. Lim, "A Predictive Length-Dependent Saturation Current Model Based on Accurate Threshold Voltage Modeling," Proc. of the 2nd International Conference on Modeling and Simulation of Microsystems (MSM99), San Juan, Puerto Rico, Apr. 19-21, 1999, pp. 423-426.  

 
71. K. Y. Lim and X. Zhou, "Modelling of Threshold Voltage with Non-uniform Substrate Doping," Proc. of the 1998 IEEE International Conference on Semiconductor Electronics (ICSE’98), Malaysia, Nov. 24-26, 1998, pp. 27-31.  

 
72. K. Y. Lim, X. Zhou, D. Lim, Y. Zu, H. M. Ho, K. Loiko, C. K. Lau, M. S. Tse, and S. C. Choo, "A Predictive Semi-Analytical Threshold Voltage Model for Deep-Submicron MOSFET's," Proc. of the IEEE Hong Kong Electron Devices Meeting (HKEDM98), Hong Kong, Aug. 29, 1998, pp. 114-117.  

 
73. S. S. Rofail, K. S. Yeo, K. W. Chew, X. Zhou, and T. Tang, "An Experimentally-Based DC Model for the Bi-MOS Structure and Its Adaptation to a Circuit Simulation Environment," Proc. of the IEEE Canadian Conference on Electrical and Computer Engineering (CCECE98), Waterloo, Canada, May 24-28, 1998, Vol. 1, pp. 37-40.  

 
74. T. Tang and X. Zhou, "A Dynamic Timing Delay for Accurate Gate-Level Circuit Simulation," Proc. of the 39th Midwest Symposium on Circuits and Systems (MWSCAS-96), Ames, Iowa, August 18-21, 1996, pp. 325-327.  

 
75. X. Zhou, S. Alexandrou, and T. Y. Hsiang, "Monte-Carlo Investigation of Subpicosecond Pulse Generation by Nonuniform Gap Illumination," Proc. of the 1994 Conference on Lasers and Electro-Optics (CLEO'94), Anaheim, CA, May 8-13, 1994, paper CThI20.