K. Chandrasekaran⁽¹⁾, X. Zhou⁽¹⁾, S. B. Chiah⁽¹⁾, W. Z. Shangguan⁽¹⁾, G. H. See⁽¹⁾, L. K. Bera⁽²⁾, N. Balasubramanian⁽²⁾, S. C. Rustagi⁽²⁾

Proc. of the 2005 European Solid-State Device Research Conference (ESSDERC2005), pp. 521-524

Grenoble, France, September 12-16, 2005.

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This paper presents a methodology for extraction of the physical parameters of strained-silicon MOSFET from one capacitance-voltage (C-V) measurement based on physics-based compact model and conventional C-V characterization techniques. The extracted physical parameters (such as strained-silicon layer thickness and doping as well as conduction band offset) are used to create a numerical (Medici) device structure, from which the simulated C-V data is compared with the measured data as well as that from the compact model (Xsim), which validates the extraction technique.  The proposed approach provides a simple yet physical means to probe into strained-silicon MOSFFET structures useful for characterize and model these devices, which are emerged as promising candidates for the enhancement and extension to conventional bulk-Si CMOS technology.

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