Proc. of the 9th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES2002)

Wroclaw, Poland, June 20-22, 2002, pp. 39-44.

Copyright Notice

© 2002 Technical University of Lodz. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the Editor.

This paper reviews the trends and needs in multi-level modeling in the context of deep-submicron MOSFETs and ULSI systems.  A dual-representation of transistors/circuit is proposed and demonstrated through physics-based compact modeling and single-engine circuit simulator based on subcircuit expansion.  Extension to process correlation and block-level representation is also proposed, which will be the key to studying process effects on system performance.  This consistent dual-representation allows detailed physics captured at a lower level to be propagated to the higher level of abstraction.

• [1] R. L. Pritchard, “Transistor Equivalent Circuits,” Proc. IEEE, Vol. 86, 1998, pp. 150–162.
• [2] X. Zhou, K. Y. Lim, and D. Lim, “A General Approach to Compact Threshold Voltage Formulation Based on 2-D Numerical Simulation and Experimental Correlation for Deep-Submicron ULSI Technology Development,” IEEE Trans. Electron Devices, Vol. 47, 2000, pp. 214–221.
• [3] X. Zhou and K. Y. Lim, “Unified MOSFET Compact I–V Model Formulation through Physics-Based Effective Transformation,” IEEE Trans. Electron Devices, Vol. 48, 2001, pp. 887–896.
• [4] X. Zhou, S. B. Chiah, K. Y. Lim, Y. Wang, X. Yu, S. Chwa, A. See, and L. Chan, “Technology-Dependent Modeling of Deep-Submicron MOSFET’s and ULSI Circuits,” Proc. 6th Int. Conf. Solid-St. IC Tech. (ICSICT2001), Vol. 2, Shanghai, 2001, pp. 855–860.
• [5] X. Zhou, “Xsim: A Compact Model for Bridging Technology Developers and Circuit Designers,” Proc. 5th Int. Conf. Mod. Sim. Microsys. (MSM2002), San Juan, Puerto Rico, 2002.
• [6] T. Tang and X. Zhou, “Multi-Level Digital/Mixed-Signal Simulation with Automatic Circuit Partition and Dynamic Delay Calculation,” J. Mod. Simul. Microsys., Vol. 1, 1999, No. 2, pp. 83–89.
• [7] X. Zhou, “Mixed-Signal Multi-Level Circuit Simulation: An Implicit Mixed-Mode Solution,” Proc. Nat. Seminar VLSI: Sys., Des. Tech. (VSDT), Indian Institute of Technology, Bombay, 2000, pp. 10–15.
• [8] See complete information at the website:

http://www.ntu.edu.sg/home/exzhou/research/doust/pub.htm
• [9] http://public.itrs.net/