Proc. of the IEEE Canadian Conference on Electrical and Computer Engineering (CCECE98)

Waterloo, Canada, May 24-28, 1998, Vol. 1, pp. 37-40.

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This paper presents an experimentally-based model that can accurately describe the hybrid-mode operation of deep submicron LDD pMOSFETs in a circuit environment.  Unified equations for the MOS, bipolar, and space charge currents of the Bi-MOS structure were derived and later adapted to meet the circuit simulation requirements.

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S. S. Rofail, K.-S. Yeo, K.-W. Chew, "DC model for BiMOS structure and its adaptation to a circuit simulation environment," IEE Proc. - Circuits, Devices Syst., Vol. 146, No. 2, pp. 83-89, Apr. 1999. 

IEL Citation