Local/Regional Journal and Conferences

Journal

  1. K. Y. Lim, X. Zhou, and Y. Wang, "Physics-Based Threshold Voltage Modeling with Reverse Short Channel Effect,"J. Modeling Simulation Microsystems (JMSM), Vol. 2, No. 1, pp. 51-55, 2001. Download PDF View Citation

    2.  
  2. T. Tang and X. Zhou, "Multi-Level Digital/Mixed-Signal Simulation with Automatic Circuit Partition and Dynamic Delay Calculation," J. Modeling Simulation Microsystems (JMSM), Vol. 1, No. 2, pp. 83-89, Dec. 1999. Download PDF View Citation

    3.  
  3. X. Zhou and T. Tang, "Multi-Level Modelling of GaAs High-Speed Digital Circuits," The EEE Journal, School of Electrical and Electronic Engineering, Nanyang Technological University, Vol. 7, No. 1, pp. 58-64, Jul. 1995.
Conference
  1. X. Zhou, "Physics-Based Compact Variability/Reliability Modeling for Emerging Double-Gate/Nanowire MOSFETs," (Invited Talk), the 9th International Conference on ASIC (ASICON2011), Xiamen, China, Oct. 28, 2011.

    2.  
  2. X. Zhou, S. H. Lin, and M. K. Srikanth, "Statistical Compact Modeling for Emerging Nanowire / FinFET Mismatch and Variance Studies," (Invited Paper), Proc. of the 6th International Conference on Materials for Advanced Technologies (ICMAT2011), Symposium W: Reliability and Variability of Emerging Devices for Future Technologies and ULSI Circuits and Systems, Singapore, June 2011, Paper W6-2.

    3.  
  3. Z. H. Chen, X. Zhou, M. K. Srikanth, G. J. Zhu, and S. H. Lin, "Unified Compact Modeling of Drain-Source Current for Bulk MOSFETs with Interface Traps," Proc. of the 6th International Conference on Materials for Advanced Technologies (ICMAT2011), Symposium W: Reliability and Variability of Emerging Devices for Future Technologies and ULSI Circuits and Systems, Singapore, June 2011, Poster W-PO1-7.

    4.  
  4. X. Zhou, G. J. Zhu, S. H. Lin, Z. H. Chen, M. K. Srikanth, Y. F. Yan, R. Selvakumar, W. Chandra, J. B. Zhang, C. Q. Wei, Z. H. Wang, and P. Bathla, "Subcircuit Approach to Inventive Compact Modeling for CMOS Variability and Reliability," Proc. of the 12th International Symposium on Integrated Circuits, Devices & Systems (ISIC2009), Singapore, Dec. 2009, pp. 133-138.

    5.  
  5. X. Zhou, G. J. Zhu, S. H. Lin, C. Q. Wei, J. B. Zhang, Z. H. Chen, M. K. Srikanth, R. Selvakumar, and Y. F. Yan, "Unification of MOSFET Compact Models with the Unified Regional Modeling Approach," (Invited Talk), MOS-AK Workshop, Baltimore, MD, Dec. 9, 2009.

    6.  
  6. X. Zhou, G. J. Zhu, G. H. See, J. B. Zhang, S. H. Lin, C. Q. Wei, Z. H. Chen, M. K. Srikanth, Y. F. Yan, R. Selvakumar, and W. Chandra, "Unified Compact Modeling for Bulk/SOI/FinFET/SiNW MOSFETs," (Invited Paper), Proc. of the 2nd International Workshop on Electron Devices and Semiconductor Technology (IEDST2009), Mumbai, India, Jun. 2009, Paper I8.

    7.  
  7. X.-F. Wang, L.-N. Zhao, Z.-H. Yao, Z.-F. Hou, M. Yee, X. Zhou, S.-H. Lin, and T.-S. Lee, "Ab Initio Study of Gating Effect on a Nanoscale Si/SiO2 Field-Effect Transistor," oral presentation at the 2008 Asian Conference on Nanoscience and Nanotechnology (AsiaNANO2008), Singapore, Nov. 3-7, 2008.

    8.  
  8. G. J. Zhu, G. H. See, S. H. Lin, C. Q. Wei, J. B. Zhang, Z. H. Chen, R. Selvakumar, and X. Zhou, "Xsim: Unification of MOSFET Compact Models with the Unified Regional Modeling Approach," poster presentation at the MOS-AK/ESSDERC/ESSCIRC Workshop, Edinburgh, UK, Sep. 19, 2008.

    9.  
  9. X. Zhou, G. H. See, Z. M. Zhu, S. H. Lin, C. Q. Wei, G. J. Zhu, G. H. Lim, "Unified Compact Modeling of Emerging Multiple-Gate MOSFETs," (Invited Paper), Proc. of the 2007 International Workshop on Electron Devices and Semiconductor Technology (IEDST2007), Beijing, China, Jun. 4, 2007, pp. 31-36.

    10.  
  10. W. Z. Shangguan, X. Zhou, S. B. Chiah, G. H. See, K. Chandrasekaran, "A Transfer-matrix Based Compact Gate Tunneling Current Model," the 3rd International Conference on Materials for Advanced Technologies (ICMAT-2005), Symposium L: Materials Physics at Interfaces, Singapore, Jul. 3-8, 2005, Paper L-8-OR21.

    11.  
  11. X. Zhou, S. B. Chiah, K. Chandrasekaran, G. H. See, W. Z. Shangguan, S. M. Pandey, C. H. Ang, M. Cheng, and S. Chu, L.-C. Hsia, "Unified Regional Charge Model with Non-pinned Surface Potential," (Invited Paper), Proc. of the 2nd International Workshop on Compact Modeling (IWCM-2005) at the Asia and South Pacific Design Automation Conference (ASP-DAC2005), Shanghai, Jan. 20, 2005, pp. 13-17.

    12.  
  12. Y. Wang, X. Zhou, K. Y. Lim, and S. B. Chiah, "Investigation of MOSFET Series Resistance by Numerical Simulation and Compact Modeling," Proc. of the 9th International Symposium on Integrated Circuits, Devices & Systems (ISIC2001), Singapore, Sep. 3-5, 2001, pp. 238-241. Download PDF

    13.  
  13. X. Zhou, "Hetero-Material Gate Field-Effect Transistors (HMGFET's)," (Invited Paper), Proc. of the Bluetooth Technology: Devices and Processes for a Wireless World, Santa Clara, CA, Mar. 2001. Browse with IE

    14.  
  14. X. Zhou, "Mixed-Signal Multi-Level Circuit Simulation: An Implicit Mixed-Mode Solution," (Invited Paper), Proc. of the National Seminar on VLSI: Systems, Design and Technology (VSDT2000), Indian Institute of Technology, Bombay, India, Dec. 10-11, 2000, pp. 10-15. Download PDF View Slides

    15.  
  15. W. Qian, X. Zhou, Y. Wang, and K. Y. Lim, "Surface-Potential-Based Model of Reverse Short Channel Effect in Submicrometer MOSFETs with Nonuniform Lateral Channel Doping," in Design, Modeling, and Simulation in Microelectronics, Bernard Courtois, Serge N. Demidenko, L. Y. Lau, Editors, Proc. of SPIE, Vol. 4228, pp. 243-248, 2000.  Presented at the 2nd International Symposium on Microelectronics and Assembly (ISMA2000), Singapore, Nov. 27 - Dec. 1, 2000. Download PDF Browse with IE

    16.  
  16. Y. Wang, K. Y. Lim, W. Qian, and X. Zhou, "Investigation of Reverse Short Channel Effect with Numerical and Compact Models," in Design, Modeling, and Simulation in Microelectronics, Bernard Courtois, Serge N. Demidenko, L. Y. Lau, Editors, Proc. of SPIE, Vol. 4228, pp. 366-373, 2000.  Presented at the 2nd International Symposium on Microelectronics and Assembly (ISMA2000), Singapore, Nov. 27 - Dec. 1, 2000. Download PDF Browse with IE

    17.  
  17. W. Qian, X. Zhou, R. Liu, and T. Wei, "Analytic Model for Currents in Si/SiGe HBT with Heavy-doping SiGe Base," Proc. of the 8th International Symposium on IC Technology, Systems & Applications (ISIC-99), Singapore, Sep. 8-10, 1999, pp. 407-410.

    18.  
  18. X. Zhou, "Process-Dependent MOS Threshold Voltage Formulation Based on 2-D Process and Device Simulations," Proc. of the 7th International Symposium on IC Technology, Systems & Applications (ISIC-97), Singapore, Sep. 10-12, 1997, pp. 235-238. 

    19.  
  19. T. Tang and X. Zhou, "Accurate Timing Simulation of Mixed-Signal Circuits with a Dynamic Delay Model," Proc. of the International Workshop on Computer-Aided Design, Test, and Evaluation for Dependability (CADTED), Beijing, Jul. 2-3, 1996, pp. 309-311. 

    20.  
  20. X. Zhou and T. Tang, "Modelling and Simulation of GaAs High-Speed HEMT, HBT, and MESFET Analogue/Digital Circuits," Proc. of the 7th MINDEF-NTU Joint R&D Seminar, Nanyang Technological University, Singapore, Jan. 12, 1996, pp. 77-83.

    21.  
  21. T. Tang, X. Zhou, and C. C. Jong, "Mixed-Mode Simulation of High-Speed HFET Logic Circuit," Proc. of the 6th International Symposium on IC Technology, Systems & Applications (ISIC-95), Singapore, Sep. 6-8, 1995, pp. 510-514.

    22.  
  22. H. J. Lee, M. S. Tse, K. Radhakrishnan, K. Prasad, J. Weng, S. F. Yoon, X. Zhou, and H. S. Tan, "Selective Wet Etching of GaAs/AlGaAs Heterostructure with Citric Acid/Hydrogen Peroxide Solutions for Pseudomorphic GaAs/AlGaAs/InGaAs HFETs Fabrication," J. Materials Sci. Eng. B: Solid-State Materials for Advanced Technology, Vol. 35, pp. 230-233, December 1995;  Proc. of the 1st International Conference on Low Dimensional Structures & Devices (LDSD 95), Singapore, May 8-10, 1995.

    23.  
  23. H. J. Lee, M. S. Tse, K. Radhakrishnan, K. Prasad, S. F. Yoon, J. Weng, X. Zhou, H. S. Tan, S. K. Ting, and Y. C. Leong, "Characterization of Ni/Ge/Au/Ni/Au Contact Metallization on AlGaAs/InGaAs Heterostructures for Pseudomorphic HFET Application," J. Materials Sci. Eng. B: Solid-State Materials for Advanced Technology, Vol. 35, pp. 234-238, December 1995; Proc. of the 1st International Conference on Low Dimensional Structures & Devices (LDSD 95), Singapore, May 8-10, 1995.

    24.  
  24. H. J. Lee, M. S. Tse, J. Weng, K. Prasad, K. Radhakrishnan, S. F. Yoon, X. Zhou, H. S. Tan, S. K. Ting, and Y. C. Leong, "Fabrication and Characterization of Pseudomorphic AlGaAs/InGaAs Heterostructure Field Effect Transistors (HFETs)," Proc. of the 1st International Conference on Low Dimensional Structures & Devices (LDSD 95), Singapore, May 8-10, 1995.

    25.  
  25. M. S. Tse, H. J. Lee, K. Prasad, K. Radhakrishnan, J. Weng, S. F. Yoon, X. Zhou, and H. S. Tan, "Characterization of Au/(Ge,Si)/Pd (Si,Ge) Ohmic Contact Metallization on AlGaAs/InGaAs Heterostructures for Pseudomorphic HFET Applications," Proc. of the 1st International Conference on Low Dimensional Structures & Devices (LDSD 95), Singapore, May 8-10, 1995.

    26.  
  26. X. Zhou, "Monte Carlo Calculation of Base Transit Times in Ballistic-Base vs. Graded-Base HBTs," Proc. of the 5th International Symposium on IC Technology, Systems & Applications (ISIC-93), Singapore, Sep. 15-17, 1993, pp. 717-721. 

    27.  
  27. J. Weng, G. Ruan, and X. Zhou, "Impact of the Graded Heterojunction in the Base on the Performance of AlGaAs/GaAs HBTs," Proc. of the 5th International Symposium on IC Technology, Systems & Applications (ISIC-93), Singapore, Sep. 15-17, 1993, pp. 151-155.