Journal of Modeling and Simulation of Microsystems (JMSM), Vol. 2, No. 1, pp. 51-56, 2001.

(Manuscript received in Cambridge, MA, USA, 19th February 2000)

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This paper presents a physic-based reverse short channel effect (RSCE) model for threshold voltage (V_th) modeling of deep submicron MOSFETs. Unlike those conventional empirically-based RSCE models, the proposed model is derived based on two Gaussian pile-up profiles located at the source and drain edges of a MOSFET. The model has a simple compact form that can be utilized to characterize the advanced halo-implant MOSFETs. A detailed comparison of the proposed RSCE model with the previously proposed model is also presented. The analytical model has been applied to, and verified with, experimental data of a 0.25-µm CMOS process for ten different gate lengths as well as various drain and substrate bias conditions.

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