celebrates 50th anniversary of	IEEE	IEE
the invention of the transistor	Singapore Section	Singapore Centre

INTERNATIONAL ADVISORY COMMITTEE

C Y Chang	National Chiao Tung University
M I Elmasry	University of Waterloo
K Emerson	Mentor Graphics
M H Er	Nanyang Technological University
Y C Jenq	Portland State University
C M Melliar-Smith	Sematech
W Milne	Cambridge University
A Sedra	University of Toronto
D B Scott	Texas Instruments
R Steele	University of Southampton
C M Tang	Lucent Technologies
T L Tansley	Macquarie University
J West	Philips Semiconductors

ISIC-97 ORGANIZING COMMITTEE

CHAIRMAN		Assoc Prof Y C Tong
CO-CHAIRMAN		Assoc Prof M A Do
ADVISOR		Prof H S Tan
SECRETARY		K T Lau
TECHNICAL PROGRAMME
Chairman		Assoc Prof S S Rofail
Members		Assoc Prof P C Liu
		Dr S Birlasekaran
		Dr P Hui
		Dr S Swaminathan
		Dr H N Tan
		Mr B K Tay
		Dr X Zhou
PUBLICATIONS AND PUBLICITY
Chairman		Mr L S Ng
Members		Dr C C Jong
		Ms Yvonne Lam
		Dr M H Lim
		Mr L Siek
LOGISTICS
Chairman		Assoc Prof T H Ooi
Members		Dr S Birlasekaran
		Dr Joseph Chang
		Dr X Shi
		Dr S C Tjin
		Dr D H Zhang
FINANCE
Chairman		Ms D J Wong-Ho
Member		Mr O K Tan
CONFERENCE SECRETARIAT
	Ms B D Goh / Ms Merlin Toh  Centre for Continuing Education  NTU

WELCOME TO SINGAPORE

Situated at one of the most important crossroads of the world, Singapore is truly a place where East and West come together. The Republic’s geographical location (between latitudes 1°09’N & 1°29’N and longitudes 103°38’E & 104°05’E) has long been instrumental in Singapore’s growth as an important centre in trade, tourism and communications.

CLIMATE

Singapore has a mild tropical climate throughout the year. Temperatures reach a maximum of 32-33°C during the day, falling to a pleasant 23-25°C during evening hours. Relative humidity often exceeds 90 percent at night and in early hours of the morning shortly before sunrise. On dry afternoons it is usually between 60 and 70 percent. Rainfall is most abundant during the Northeast Monsoon season from November to January. Much of the rain falls in sudden showers.

WHAT TO WEAR

The climate encourages informal dressing and few places require a jacket and tie for gentlemen. Visitors should bring the lightest of summer wear. For men, open-necked shirts and light-weight tropical slacks are ideal. For formal functions, lounge suites for gentlemen are also recommended.

Light-weight summer dresses, slacks and tops will be suitable for day wear for ladies. All hotels and shopping centres are air-conditioned, so a long sleeve shirt for men and a light wrap for ladies is advisable, especially in the evening.

POPULATION AND LANGUAGES

In Singapore, you will find Chinese, Indian, Malay and Eurasian Communities living harmoniously together, their long established cultures forming a unique backdrop to a clean and modern garden city.

There are four official languages: English, Malay, Mandarin and Tamil. English is spoken everywhere and it is the common business language of all.

TRANSPORTATION

Public transportation, including buses and the MRT (Mass Rapid Transit) system provides access for visitors to most areas of the island. The fare is between S$0.50 and S$1.60. There are many taxis which can be hired form the taxi stands, roadside or booking by telephone. A booking fee is usually charged when hired by telephone. There is also a surcharge for trips starting from the Changi Airport. To get to and from the Changi Airport in air-conditioned comfort, ride on the AIRBUS which operates daily from 6am - midnight every 20 minutes. Tickets at S$5 (Adult) and S$3 (Child) can be purchased on board the bus. Please pay exact fare. The routes of the three airbuses are as follow:
 

AIRBUS 1	Albert Court Hotel, Ministry of Environment Building, Hyatt Regency Hotel, Boulevard Hotel, Tomlinson Road, Shangri-La Hotel, Orchard Hotel, Orchard Parade Hotel, Hilton Int’l Hotel, Royal Holiday Inn, Asia Hotel, Sungei Road.
AIRBUS 2	Bugis Junction, Allson Hotel, Excelsior Hotel, Mayfair city Hotel, YMCA Orchard, Hotel Phoenix, Mandarin Hotel, Meridian Hotel, Hotel Grand Central, Bencoolen Street, Allson Hotel, Intercontinental Hotel.
AIRBUS 3	Marina Mandarin Hotel, Pan Pacific Hotel, Ritz Carlton Millenia Hotel, Oriental Hotel, Westin Stamford Hotel, Raffles Hotel.

AIRPORT TAX

Tax is S$15. Coupons are available form the airport, travel agencies and some hotels.

CURRENCY

The unit of currency is the Singapore dollar. (US$1.00 = Approx. S$1.50)

CREDIT/CHARGE CARD

Credit cards are widely accepted in Singapore. Hotels, retailers, restaurants, travel agents and even some taxis readily accept international credit cards.

FOOD & SHOPPING

Singapore is the culinary capital of Southeast Asia, and eating out in Singapore is an experience few will forget. You can eat out at open-air food stalls or dine in the plushest of restaurants at world class hotels. In terms of sheer variety, Singapore probably has no rival. Singapore’s immigrant population and visitors from all over the world have brought a staggering array of cuisine and cooking skills as well as having created unique blends of their own.

Hawker centers and traditional coffee shop dishes rarely cost more than S$3 to S$4 each whereas dishes sold at food courts (air-conditioned and usually located at shopping centers are slightly more expensive. A meal and a soft drink in a fast food outlet cost S$4 to S$7, whereas restaurants can cost anything form S$10 to S$120 per person, depending upon where you dine and what you order.Tipping is not expected in any of Singapore’s food or entertainment outlets. Most establishments will add to your bill a 10% service charge, a Good Services Tax of 3% and in most establishments, a 1% cess tax. Additional tipping is at your discretion.

Singapore was founded on the principle of free trade, and even today, most goods are sold duty-free. An endless range of goods from all over the world are available at prices that are often lower than those in the country of manufacture. Air-conditioned shopping complexes, department stores, Chinese emporiums and shopping arcades allow visitors to shop in comfort. Most of these places stay open till 9.30pm daily.

TRAVEL DOCUMENTS

Visitors must have passport valid for three months from the time of arrival. Visas are not required for a stay of up to 14 days for Commonwealth citizens, British passport holders and citizens of the Republic of Ireland. As regulations may change from time to time, visitors should check the latest visa requirements from the Singapore Overseas Mission in your country or call the Singapore Immigration Department at 65-532-2877.

Overseas speakers who need to apply for visa must produce a valid passport, the Professional Visit Pass (PVP) waiver letter and the acceptance letter to the Singapore Overseas Mission in your country to facilitate the visa application. Your local sponsor is Nanyang Technological University, Centre for Continuing Education.

LITTERING

Singapore’s clean and green image is the result of more than two decades of public education campaigns and strict laws against littering. Littering of any kind is subjected to S$1,000 fine for first offenders, and up to S$2,000 fine and a stint of corrective work order cleaning a public place for repeat offenders. As an extension of the law against littering, the import, sale and possession of chewing gum is prohibited. The high costs and difficulties in removing indiscriminately discarded chewing gum were the reasons for the prohibition.

ELECTRICITY

Singapore’s voltage for electricity is 220 - 240 volts AC, 50 cycles per second.

SMOKING

Smoking in public buses, taxis, lifts, theatres, cinemas, government offices and air-conditioned restaurants and shopping centres is against the law. First offenders may be fined to a maximum of S$1,000. Smoking in air-conditioned pubs, discos, karaoke bars and nightspots is also not encouraged.

TOURIST INFORMATION

For more information, please visit the Singapore On-Line Guide :

http://www.travel.com.sg/sog

Organizers

The Symposium is organized by the School of Electrical & Electronic Engineering, Nanyang Technological University and is co-sponsored by Lucent Technologies, Mentor Graphics, the IEEE Singapore Section and IEE Singapore Section.

Registration

ISIC-97 Registration Desk ( Function Rooms foyer, 3^rd Level) will be opened at 3:00pm on 10 September 1997 for the distribution of Symposium Proceedings, name tags and other materials to all pre-registered delegates as well as on-site registration. Registration fees for the Symposium (Days 2 and 3) include four tea/coffee breaks, two lunches, a copy of the Symposium Proceedings and the Symposium Banquet (excluding alcoholic drinks). The tutorial fees include a copy of the tutorial notes, one lunch and two tea/coffee breaks for a full day (Day 1) tutorial session. Registration for tutorial sessions will start from 8.30am on 10 September 1997 at function room foyer, 3^rd level.

Presentation of Papers

Each paper scheduled in the technical programme session will be allotted 10-15 minutes for presentation, questions and answers. The four Keynote Addresses will each last an hour. The three Papers of Speech Interest will each last 25 minutes. All speakers are to take note that only overhead projectors and slide projectors will be available.

Special Meal Requirements

Delegates with special meal requirements (e.g. Muslim Food, Vegetarian Diet, etc) for the lunches and banquet should notify the Symposium Secretariat in writing at least 2 weeks in advance.

SYMPOSIUM VENUE

3^rd Level Function Rooms
 

Symposium Venue:

Hyatt Regency Singapore 10 - 12 Scotts Road Singapore 228211 Tel: (65) 738-1234 Fax: (65)732-1696

 

Registration Desk	Function Room Foyer, 3rd Level
Secretariat Room	Vanda I
Exhibition	Camellia
Opening Ceremony	Hibiscus
Keynote Addresses	Hibiscus
Parallel Sessions	Vanda I , Vanda II, Magnolia I, Magnolia II
Tea Break	Camellia
Lunch	Regency Ballroom, 2nd Level
Banquet	Sir Stamford Room, 2nd Level

Car park facilities are available at the hotel premises. Please inquire at the registration counter during the symposium.

Exhibition

In conjunction with the Symposium an exhibition will be held. The vendors will be displaying various products and services which are of interest to all participants involved in IC Design, Signal Processing and a host of other related areas. The exhibition will be located in the function room, CAMELLIA. The vendors participating are as follows:

1. AST Computer
2. Future Techno Designs
3. Lucent Technologies Microelectronics Asia/Pacific
4. Mentor Graphics Associates Pte Ltd
5. Viewlogic Systems, Inc.

1. AST Computer

2. Future Techno Designs

Microelectronics group, the fastest growing business unit within lucent technologies, delivers differential advantages to customers worldwide by offering total solutions in many interwoven markets - wireless and wireline telecommunications, PCs and workstations, data networking, cable TV, consumer products, and emerging technologies as well. Recognised as a worldwide leader in quality and market leadership position in:

Digital Cellular DSPs

Standard-Cell ASICs

High Speed Modem Chip Sets

Digital TAD Chip Sets

Video Conferencing ICs

Transmissions ICs

Electronic Power Systems For Telecommunications Industry

Components And Subsystems For Single-Mode Fiber Optic Communications

 "We make the things that make communications work."

1. Products and Services


MGA’s EDA products and professional services enable customers to become more competitive by increasing their productivity and product quality, while reducing development costs and time to market. The data explosion resulting from massively complex designs and design processes, coupled with the inefficiency of creating proprietary libraries and processes, is causing a mega-trend in the EDA industry of design reuse and design process management. MGA is committed to being the leading provider of tools, integration and process technologies, including consistent libraries and parts models, and services essential for successful managing design data and processes. In addition to providing MGC’s suite of best of class EDA tools, MGA also provides solutions and services from Quickturn, Xilinx / NeoCAD, Aptix, Logic Modeling Group and Hewlett-Packard and Sun Microsystems workstations and servers.

2. Our Customers

KEYNOTE ADDRESSES

1. "The Invention of the Transistor – The Foundation of the Silicon Age"


Ian Ross, President Emeritus of Bell Laboratories

2. "Chips, Circuits And Systems In A Works-With World: Ten Predictions For The Future"


Arno Penzias, Nobel Laureate, Vice President and Chief Scientist, Lucent Technologies Bell Laboratories

3. "The Integrated Circuit into the Next Century: When Do We Approach the Limits of Physics, Complexity, and Affordability?"


Mark Pinto, Director, IC Research ,Lucent Technologies / Bell Laboratories

4. "Integrated Circuit Manufacturing Challenges Over The Next Decade"


Mark Melliar-Smith, President and CEO of SEMATECH

ISIC-97 PROGRAMME SCHEDULE
 

	Thursday, 11 September 1997
8:00	Registration
9:00	Welcome address by the Chairman
9:10	Opening Address by Guest-Of-Honour
9:30	Tea Break (CAMELLIA)
10:00	Keynote Address  Title : The Invention of the Transistor – The Foundation of the Silicon Age Speaker : Ian Ross, President Emeritus of Bell Laboratories Venue : HIBISCUS
11:00	A1 VANDA II Device & IC Technology I (Thin Film)	B1 VANDA III Integrated Circuits & Systems I	B2 MAGNOLIA I Integrated Circuits & Systems II	C1 MAGNOLIA II Design Automation I	E1 HIBISCUS Signal Processing I (Speech & Image Processing)
12:30	Lunch Break (REGENCY BALLROOM)
14:00	Keynote Address  Title : Chips, Circuits And Systems In A Works-With World:Ten Predictions For The Future Speaker : Arno Penzias, Nobel Laureate, Vice President and Chief Scientist, Lucent Technologies Bell Laboratories. Venue : HIBISCUS
15:00	A2 VANDA II Device & IC Technology II (Modelling)	B3 VANDA III Integrated Circuits & Systems III (Low-Power Low-Voltage IC Design)	B4 MAGNOLIA I Integrated Circuits & Systems IV (Simulation & Testing)	C2 MAGNOLIA II Design Automation II (Synthesis, Simulation & Testing)	D1 HIBISCUS Applications I (Communication Systems)
16:10	Tea Break (CAMELLIA)
16:30	A3 VANDA II Device & IC Technology III (Device Physics)	B5 VANDA III Integrated Circuits & Systems V	B6 MAGNOLIA I Integrated Circuits & systems VI (Neural Networks & Fuzzy Logic)	C3 MAGNOLIA II Design Automation III	E2 HIBISCUS Signal Processing II
19:00	Symposium Banquet Reception
19:30	Symposium Banquet (SIR STAMFORD ROOM)

 
 

	Friday, 12 September 1997
8:00	Registration
9:00	Keynote Address  Title : The Integrated Circuit into the Next Century: When Do We Approach the Limits of Physics, Complexity, and Affordability? Speaker : Mark Pinto, Director, IC Research, Lucent Technologies / Bell Laboratories Venue : HIBISCUS
10:00	Tea Break (CAMELLIA)
10:30	A4 VANDA II Device & IC Technology IV (Electrical Characterization)	A5 VANDA III Device & IC Technology V (Compound Semiconductors)	B7 MAGNOLIA I Integrated Circuits & Systems VII (Circuit Design & Architecture)	B8 MAGNOLIA II Integrated Circuits & Systems VIII (Sensors & Switching Circuits)	C4 HIBISCUS Design Automation IV
12:30	Lunch Break (REGENCY BALLROOM)
14:00	Keynote Address  Title : Integrated Circuit Manufacturing Challenges Over The Next Decade Speaker : Mark Melliar – Smith, President and CEO of SEMATECH Venue : HIBISCUS
15:00	A6 VANDA II Device & IC Technology VI (Device Characterization	B9 VANDA III Integrated Circuits & Systems IX (Low-Power Low-Voltage IC Design)	C5 MAGNOLIA I Design Automation V (Synthesis, Simulation & Testing)	D2 MAGNOLIA II Applications II (Switched Power Supplies & Audio Cards)	E3 HIBISCUS Signal Processing III (Specialized Signal Processing)
16:10	Tea Break (CAMELLIA)
16:30	A7 VANDA II Device & IC Technology VII (Device Scaling)	A8 VANDA III Device & IC Technology VIII (Testing)	B10 MAGNOLIA I Integrated Circuits & Systems X	C6 MAGNOLIA II Design Automation VI (Synthesis and Optimization)	C7 HIBISCUS Design Automation VII (High Level Description & Physical Design)

TECHNICAL PROGRAMME
 

Session A1	Day Thursday		Time 11:00 – 12:30		Room VANDA II
Device & IC Technology I (Thin Film) Chaired by Dr Swaminathan S
Thermal Stability of Amorphous Hydrogenated Carbon Films Deposited Using Electron Cyclotron Resonance Chemical Vapour Deposition System Zhang Q / Yang H / Rusli / Yoon S F / Ahn J, Singapore
Deposition Thickness Characterization of A1, NiCr & SiO2 Thin Film on Substrate by ARC-12M Sputtering Julius St M / Saputra A / Effendi E H, Indonesia
Si Bipolar Transistors with Low Temperature Plasma Deposited Emitters Sasaki K, Japan
Improvement on HCI and ESD by HALO-Implant and P-Combination Injection for Submicron VLSI Lee M O / Chung J H, Korea
Molecular Beam Epitaxial Growth of GaAs/AIAs Superlattices on GaAs (311) Substrates Yoon S F / Zhang P H, Singapore
Some Properties of Hydrogenated Amorphous Carbon Films Deposited Using Electron Cyclotron Resonance CVD Yoon S F / Yang H / Rusli / Ahn J / Zhang Q / Poo T L, Singapore
On the Deposition of Amorphous Hydrogenated Carbon Films Prepared Using ECR-CVD Technique Zhang Q / Yoon S F / Rusli / Ahn J / Yang H, Singapore
Session B1	Day Thursday		Time 11:00 – 12:30		Room VANDA III
Integrated Circuits & Systems I Chaired by Dr Chang, Joseph
DYNAMIC TRANSLINEAR CIRCUITS – AN OVERVIEW (PAPER OF SPECIAL INTEREST) Mulder J / Serdijn W A / C Van Der Woerd A / H M Van Roermund A, The Netherlands
Micro Power 14-bit A/D Converter : 45 uW At± 1.25 V and 16 K samples/s Grisoni L / Heubi A / Balsiger P / Pellandini F, Switzerland
Switched-Current Sinusoidal Oscillators – Single Phase and Multiphase Jia X D / Niu G F / Chen R M M, Hong Kong, China
Techniques to improve the Convergency Speed of Relaxation-Based Circuit Simulations on Tightly Coupled Circuits Chen R M M / Jia X D / Han L, Hong Kong, China
An Analogue Circuit Optimiser Lam Y / Zwolinski M, Singapore
Performance Improvement of Single Phase PWM Rectifier Drives Milimonfare J / Nazarzadeh J, Iran
Session B2	Day Thursday		Time 11:00 – 12:30		Room MAGNOLIA I
Integrated Circuits and Systems II Chaired by Mr Lau Kim Teen
A Synchronous Completion Prediction Adder (SCPA) with High Hardware-Delay Performance Lee J / Asada K, Japan
A Single-Phase Clock High-Performance BiCMOS Latch Nikolic B / Oklobdzija V, USA
VLSI Design of the RSA Public-Key Cryptosystem Lu S K / Wu C W, Taiwan
Constant Offset Sample-and-hold CMOS Switching Circuit Yong Y K / Li M F / Lim Y C / Yep S Y, Singapore
Digital First-Order Filter for Pulse-Duration Modulated Signal Varshavsky V I / Marakhovsky V B, Japan
Grouped Tabular Technique for Reed-Muller Logic Yang H / Tan E C, Singapore
A Write Circuit for Magnetic Disk Drives Chan P K / Voo T / On A Y / Weiner N, Singapore
Session C1	Day Thursday		Time 11:00 – 12:30		Room MAGNOLIA II
Design Automation I Chaired by Dr Falkowski, Bogdan
DECISION DIAGRAMS FOR REPRESENTATION OF DISCRETE FUNCTIONS IN VLSI COMPUTER-AIDED DESIGN SYSTEMS (PAPER OF SPECIAL INTEREST) Falkowski B / Stankovic R, Singapore
A Path Sensitization Approach for Performance Optimization Cremoux S / Monnier T / Azemard N / Auvergne D, France
Symbolic Algorithms for the Multiple Fault Location in Low Testability Analog Circuits Fedi G / Giomi R / Luchetta A / Manetti S / Piccirilli M, Italy
An Area Minimization Technique for Implementing Pipelined IIR Filters Krishnan R / Srinivasan S, India
A Parallel Distributed Model to Implement 6 x 6 – Point DFT Gopikakumari R / Sridhar C S, India
A Generalised Successive Approximation Algorithm for A/D Conversion Dighe A M / Gandhi A S, India
Session E1	Day Thursday		Time 11:00 – 12:30		Room HIBISCUS
Signal Processing I (Speech and Image Processing) Chaired by Dr Lim Meng Hiot
An Adaptive-Block Predictive Codec for Speech Processing Thomas T / Sridhar C S, India
MPEG2 System/Video Decoder IC for the DVD Player Wilson W B / Lim S T / Akiyama T / Toyokura M, Singapore
Simplified Fast Stabilized Adaptive Noise Canceller with Parallel Block Structure Benjangkaprasert C / Janchitrapongvej K / Saingaroon O / Takahashi N, Thailand
Road Data Based Car Movement Animations for Road Plan Liu Z / Zhang S J / Aoki Y, Japan
A Speech Training Tool for Motor Speech Impairment Calder D J / Chen B M / Mann G, Australia
Development of an Optical Image Processing System for Pattern Recognition and Inspection Lim T K / Zhou Y / Ong C B / Tan K Y, Singapore
Continuous Speech Recognition Based on a Self-Learning Neuro-Fuzzy Network Hsieh C T / Su M C / Hsu C H / Chen U J, Taiwan
Session A2	Day Thursday		Time 15:00 – 16:10		Room VANDA II
Device & IC Technology II Modelling Chaired by Dr Zhou Xing
Submicron Interconnect Modelling For Timing Evaluation Deschacht D / Vanier E, France
Simulation of Recessed Channel SOI MOSFET Samudra G S / Yip A, Singapore
An Efficient Parallel GMRES Accelerated Waveform Method for Transient Simulation of Semiconductor Devices Yang T R, Sweden
Reoxidized MESA Isolated SOI MOSFET Width Scaling as a Function of Silicon Film Thickness Fung K H / Chan M S / Ko P K, Hong Kong, China
Session B3	Day Thursday		Time 15:00 – 16:10		Room VANDA III
Integrated Circuits & Systems III Chaired by Mr Lau Kim Teen
Efficient Low Power Circuit Design with Gallium Arsenide Latched Logic Lachowicz / Eshraghian K / Pfleiderer H J, Australia
Low Power TFSOI ICs for Wireless Applications Lee M O / Chung J H / Choi B S, Korea
Low Power Circuit Implementation for High Speed Optical Communication Receiver Lee M O / Lee H D, Korea
A Low-Voltage Third Order Sigma Delta ADC Design Ong C K / Siek L / Ng L S, Singapore
A Micropower 3V Programmable Highpass Filter for Hearing Aids Luo L J / Chang J / Tong Y C, Singapore
Session B4	Day Thursday		Time 15:00 – 16:10		Room MAGNOLIA I
Integrated Circuits and Systems IV (Simulation and Testing) Chaired by A/Prof Liu Po-Ching
Large Change Sensitivity Analysis for Testing Large Scale Analog Circuits Wei T / Wong W T / Lee Y S, Hong Kong, China
Test Pattern Design for Low Power ULSI Applications Chung J H / Lee M O, Korea
System Modeling of High-Speed Digital Printed Circuit Board Kung W L / Chuah H T, Malaysia
Transparent Tests for Semiconductor Memory Yarmolik V / Klimets Y / Demidenko S / Piuri V, Singapore
Hybrid Test Generation Approach for Multiple Fault Detection of TSC System Implemented with CMOS Two-Rail Checker Pang C W / Wong W T / Lee Y S, Hong Kong, China
Session C2	Day Thursday		Time 15:00 – 16:10		Room MAGNOLIA II
Design Automation II (Synthesis, Simulation and Testing) Chaired by Dr Falkowski, Bogdan
Logic Synthesis Using a Genetic Algorithm Ohmori K / Kasai T, Japan
The Efficient System for Behavioural Simulation of Complex Digital Circuits and Processes Szajna J, Poland
System Emulation, An Evolutionary Step after Logic Simulation Chang M, USA
Logic Testing of Switch-Level Faults for CMOS Unate Networks Shieh Y R / Wu C W, Taiwan
A Simulation Tool for Switched-Capacitor Sigma-Delta (S D ) Converter Ho Y S / Rezaul Hasan S M / Muhd. Yusof A, Malaysia
Session D1	Day Thursday		Time 15:00 – 16:10		Room HIBISCUS
Applications I (Communication Systems) Chaired by Dr Lim Meng Hiot
Expression Methods of Satellite Signals of Troposphere Scintillation Phenomena Saingaroon O / Benjankaprasert C / Sriteeravirojana U / Moriya Y, Thailand
AC-3 Decoder Chip Tan P Y / Ng K L / Tan A P / Tanabe N / Nishio T / Kojima S / Matsumoto M, Singapore
Luo-Converters, New DC-DC Step-Up Converters Luo F L, Singapore
A New Efficient Method and Application in Measuring the Coverage of FM & TV Broadcasting Wang Z, China
Session A3		Day Thursday		Time 16:30 – 18:00		Room VANDA II
Device & IC Technology (III) Device Physics Chaired by Dr Zhou Xing
Process-Dependent MOS Threshold Voltage Formulation Based on 2-D Process and Device Simulations Zhou X, Singapore
Deep Level States Caused by Dislocations in MBE Growth p-InGaAs/GaAs Heterostructures Du A Y / Li M F / Chong T C / Teo K L / Lau W S, Singapore
Study on Excitonic Absorptions in Wurztite GaN by Photovoltaic Spectra at Room Temperature Liu W / Li M F / Chua S J / Zhang Y H / Uchida K, Singapore
An Anormalous Temperature Dependence of the Electron-Acceptor Recombination in Heavily Si-doped GaAs/AlAs Quantum Wells Zhang Y H / Lim F / Liu W / Yen AC / Sheng TT / Zhao SP / Wang JLF, Singapore
Effect of Wafer Warpage on Leakage Yield Loss of Bipolar Transistors Chiou H D . Yahya A R, Malaysia

 
 

Session B5	Day Thursday		Time 16:30 – 18:00		Room VANDA III
Integrated Circuits and Systems V Chaired by Mr Siek Liter
Folding Cum Interpolation ADC Siek L / Bhatt A, Singapore
GaAs DCFL Circuit Buffering Methodology Royannez P / Amara A, Germany
Nonlinearities and Chaos in NMOS Phase-Locked Loop Siu W K / Wong H / Cheung TS , Hong Kong, China
A Full-Swing BiCMOS Schmitt Trigger Circuit Design Dejhan K / Korphayakkhin W / Suriyaammaranon C / Tooprakai P / Cheevasuvit F, Thailand
A High Performance MOSFET Voltage-Controlled Floating Resistance Circuit Dejhan K / Soonyeekan C / Prommee P / Tooprakai P / Cheevasuvit F, Thailand
Improved Cross-Coupled Quad Transconductor Cell Lai W H / Lim Y C / Li M F, Singapore
Low Cost Transceiver For Universal Serial Bus Chee P Y / Tjia J / Chua J, Singapore
Session B6	Day Thursday		Time 16:30 – 18:00		Room MAGNOLIA I
Integrated Circuits & Systems IV (Neural Networks and Fuzzy Logic) Chaired by Prof Salama M
Evaluation of Neural Network Speaker Verification System with Limited Training Data on Telephone Quality Speech Hussain S, Malaysia
Design of Digital Artificial Neural Network Chip with Ternary Activation Function Xu Y P / Lin Z C, Australia
Three Dimensional Artificial Cellular Neural Network (3-D ACNN) Hiratsu D / Nagao T, Japan
Proposal of New Selection Operator for Genetic Algorithm Kojima K / Ishigame M / Matsuo H, Japan
Artificial Neural Networks Based Harmonic Estimator Hegazy Y G / Salama M MA / Chikhani A Y, Canada
Session C3	Day Thursday		Time 16:30 – 18:00		Room MAGNOLIA II
Design Automation III Chaired by Dr Falkowski, Bogdan
EVOLUTIONARY ALGORITHMS IN COMPUTER AIDED DESIGN (PAPER OF SPECIAL INTEREST) Drechsler R, Germany
Efficient Functional Diagnosis for Synchronous Sequential Circuits Based on AND / OR Graphs Drechsler R / Zuzek A, Germany
EXOR Transform of Inputs to Design Efficient Two-Level AND/EXOR Adders Drechsler R / Becker B, Germany
An Efficient Hierarchical Algorithm for Module Placement for Large Chips Yang T R, Sweden
An Efficient Register – Transfer Level Partitioning Approach for Testability Yang T R, Sweden
Session E2	Day Thursday		Time 16:30 – 18:00		Room HIBISCUS
Signal Processing II Chaired by Dr Lim Meng Hiot
Improved Computational Structure for the 2-D DCT Bi G A / Chen Y Q, Singapore
A Versatile Signal Processing Board for Real-Time Multimedia Communication Wang M R / Wang J S / Huang Y T / Hsu M H / Shieh M D / Wu C H / Jeng B S, Taiwan
Applications of Neural Networks in Handwritten Digit Recognition Hsieh C T / Su M C / Yang S L / Shen K M, Taiwan
Performance Analysis of M-ary Signalling in Fiber-Optic CDMA Communication System with Modal Noise Meenakshi M / Ravichandran V C, India
The Parametrization of Orthonormal Compactly Supported Wavelet Bases & Its Improvement to CELP Code Scheme Li X / Wang B L / Zhao E Y / Hu J D, China
Estimating Transformation Length in Linear-To-Minimum-Phase Transformation Using Cepstrums Bysted T K, Denmark
Session A4		Day Friday		Time 10:30 – 12:30		Room VANDA II
Device & IC Technology (IV) Electrical Characterization Chaired by Dr Shi Xu
Photoluminescence of GaAs/AIGaAs Triple Quantum Wells for Laser Devices Grown by Molecular Beam Epitaxy Zhang D H / Li C Y, Singapore
Effects of Constant Current-Stressing on Reoxidized Nitrided Oxide (ONO) in Flash Memory Devices CHA C L / Chor E F / Gong H / Zhang A Q / Chan L / Xie J, Singapore
Modelling Submicron Transistor with Unified BSIM3 Model Leong C / Lim D, Singapore
Characterization of Tetrahedral Amorphous Carbon Films by Raman Spectrometry Tay B K / Shi X / Yang H S / Sun Z, Singapore
Characterization of N-Type Tetrahedral Amorphous Carbon (taC)/p-type Silicon Heterojunction Diodes Tay B K / Shi X / Hui F / Cheah L K, Singapore
Narrow Channel Self-Masking Effect Consideration for Mask/Space bias Optimization in Sub-Half-Micron ULSI with LOCOS Isolation Loiko K V / Peidous I V / Ho H M / Quek K B / Lim H Y, Singapore
Investigation of the Influrence of Device Technology on the Performance of High Frequency A1GaAs/GaAs HBTs Wang H / Berauer F / Ng G I, Singapore
Dependence of the Composition of InAs1-x Sbx on the Mole Fraction of In in the Melt Using LPE Chatrath V / Chua S J / Karunasiri G / Mao Y, Singapore
Session A5	Day Friday		Time 10:30 – 12:30		Room VANDA III
Device & IC Technology (V) Compound Semiconductors Chaired by Dr Zhou Xing
Photoluminescence Studies of Nitrogen Doped Gallium Phosphide Grown by Liquid Phase Epitaxy Saith S / Chua S J, Singapore
Tensile Strained InGaAs/AlGalnAs MQW Laser Emitting at 1.55m m Khoo H K / Chua S J / Karunasiri G, Singapore
Instabilities of Longitudinal Waves in Solid State Plasma and Microwave Oscillations in InSb, InAs p-n Junctions Kamakura K, Japan
Influence of Temperature and d -Doped Layer Concentration on P-HFETs Gonzalez B / Hernandez A / Garcia J / Nunez A, Spain
IDDQ Testable Configuration for PLAs by Transformation into Inverters Wu C F / Wang C C / Hwang R T / Kao C H, Taiwan
Design and SPICE Modelling of a Static RAM Aziz S M, Bangladesh
Numerical Model for Determining the Switching Characteristics of GaAs-MESFET with Non-Uniform Doping Profile in the Channel Chakrabarti P / Madheswaran M / Rajamani V / Mishra B K, India
Session B7	Day Friday		Time 10:30 – 12:30		Room MAGNOLIA I
Integrated Circuits and Systems VII (Circuit Design and Architecture) Chaired by Dr Jong Ching Chuen
Design Methodology and Performance Estimation for GaAs MESFET Logic Singh J / Malyniak R / Kalam A / Zayegh A, Australia
A Parameterized and Extensible DSP Core Architecture Kuulusa M / Nurmi J, Finland
Hardware Implementation of Residue Generators with Respect to 2A + 1 Moduli Toyoshima H, Japan
Comparison of Different Methods of Obtaining the Retrograde N-well Parasitic Bipolar Bypass Resistance for 0.25um Technology Leong KC / Liu PC / Gan CH / Qian G, Singapore
Exploration of Design Architectures in Rapid Prototyping with FPGA Jong C C / Ng L S / Ho V M / Cham L P, Singapore
Numerical Simulation for Single Electron Logic Gates Chen Y / Lu W / Ng G I / Yoon S F, Singapore
On the Implementation of Wave-Pipelined Multipliers in Lookup Table-Based FPGAs Ke Y S / Shieh M D / Sheu M H, Taiwan
A Design of Two Dimensional Inverse Discrete Cosine Transform for MPEG Decoder Chips Wanvimonsri N / Boonyanit K, Thailand
GMC Equalizer Design for Optical Storage Systems Hon Y K J / Elangovan N, Singapore
Session B8	Day Friday		Time 10:30 – 12:30		Room MAGNOLIA I
Integrated Circuits and Systems VIII (Sensors and Switching Circuits) Chaired by Dr Birlasekaran S
Development of P+ Silicon Electrostatic Microactuator Using Direct Wafer Bonding Technology Chandra S / Chan A / Singh J / Kumar M, India
A Fe203 – Sn02 Based Gas Sensor for Ethanol Tan O K / Zhu W / Yao K / Toh G S / Teh S Y / Jiang J Z, Singapore
A Review on Smart Gas Sensors Birlasekaran S / Ooi T H, Singapore
A New Approach for Piezoresistor Design Chou Y F / Lin R S, Taiwan
Magnetic Field Sensor Using CMOS MAGFET Array Sriningsih A E / Hartanto D, Indonesia
A Design of Optical Pressure Sensor Using a Photoelastic Sensing Element Hartanto D / Silitonga R B UH / Poespawati N R / Ekadiyanto F A, Indonesia
A New Computer-Aided Analysis Algorithm for SC Circuits Yong Z Z, China
Does Current Sensor Make Sense ? Varshavsky V, Japan
An Improved Tuning Circuit for Continuous-Time Filters Fang S J / Tan K S / Li M F, Singapore
Session C4	Day Friday		Time 10:30 – 12:30		Room HIBISCUS
Design Automation IV Chaired by Mr Lau Kim Teen
Dynamic Pipeline Architecture for Adaptive Binary Arithmetic Codes Jou J M / Kuang S R, Taiwan
A Parallel and Vectorized Switch Level Simulator for MOS VLSI Circuits Heng C K / Javed Absar M / Bhardwaj M / Hsu W J, Singapore
Independent Separation of Bipartite Graph and Its Application in Cover Problem Che W G / Su L / Wang H X, China
Concurrent Simulation of Heterogeneous Multiprocessor Embedded Systems Gardner W B / Serra M, Canada
An IDDQ Testable Design for PLA Tang J J, Taiwan
a Service : A Low Cost IC Prototyping Service Tan C H / Heng B S / Yoong S J / Tan K S, Singapore
Hazard-Free Asynchronous Design for CMOS Implementation Lemberski I, Latvia
Complex Spectral Transforms for Classification of Switching Functions Falkowski B / Rahardja S, Singapore
Dichotomy-Based Constrained Encoding for Low Switching Activity in Asynchronous Finite State Machines Shieh M D / Sheu M H / Wang H R / Cheng H C, Taiwan
Session A6	Day Friday		Time 15:00 – 16:10		Room VANDA II
Device & IC Technology VI Device Characterization Chaired by Dr Birlasekaran S
Study of Conduction Mechanism of Motorola Micro Gas Sensor Koh B C / Foon W H / Birlasekaran S, Singapore
Photon Induced Hump Effect in NMOSFET Zhang W Q / Chan M S / Fung S / Chan S / Ko P, Hong Kong, China
The Investigation on the Deposition Kinetics of Sub-Atmospheric Pressure Glass Film Vassiliev V Y / Zheng J Z, Singapore

 
 

Session B9	Day Friday	Time 15:00 – 16:10	Room VANDA III
Integrated Circuits and Systems IX (Low-Power Low-Voltage IC Design) Chaired by Mr Lau Kim Teen
A Technique to Reduce Power Consumption in CMOS Circuits  Girard P / Landrault C / Pravossoudovitch S / Severac D, France
New GaAs Memory Cell Flip Flop Minimizing Power Dissipation Kanan R / Hochet B / Kaess F / Declercq M, Switzerland
An Energy Recovery Logic Family for Low-Power VLSI Wang W Y / Lau K T / Liu F, Singapore
Low-Power Programmable Logic Array Using Energy Recovery Principles Lau K T / Wang W Y, Singapore
Low Power Low Voltage Adder for High Performance DSP Wu A / Ng C K, Hong Kong, China
Session C5	Day Friday	Time 15:00 – 16:10	Room MAGNOLIA I
Design Automation V (Synthesis, Simulation and Testing) Chaired by Dr Jong Ching Chuen
Exploring Conditional Mutual Exclusion in Behavioral Synthesis Shen Z X / Jong C C, Singapore
An Optimal Performance -Driven Technology Mapping for MUX-Based FPGA Synthesis Yi K / Ohm S Y / Kim M J / Jhon C S, Korea
Application of Mixed Arithmetic Logic in Testing of Digital Circuits Rahardja S / Falkowski B J, Singapore

 
 

Session D2	Day Friday	Time 15:00 – 16:10	Room MAGNOLIA II
Applications II (Switched Power Supplies and Audio Cards) Chaired by A/Prof Ooi Tian Hock
A PC-Based Digital Audio Processor Card Ooi T H / Lau K T / Lim C H / Tan C G / Yap S C / Pok KA / Wong CJ, Singapore
A Mixed Mode Power Supply Lim C H / Ooi T H, Singapore
A Novel Switched Mode Power Supply for IGBT Inverter Patil S R / Patil R O, India
Session E3	Day Friday	Time 15:00 – 16:10	Room HIBISCUS
Signal Processing III (Specialized Signal Processors) Chaired by Dr Lim Meng Hiot
Signed and Unsigned Multiplication Using a Single Cellular Array Aziz S M / Rouf Z / Kamruzzaman J, Bangladesh
Grobner Basis with Queue Approach to Solve Welch-Berlekamp Equation Maidee P / Choomchuay S, Thailand
Session A7	Day Friday	Time 16:30 – 18:00	Room VANDA II
Device & IC Technology VII (Device Scaling) Chaired by Dr Swaminathan S
Scaling Issues for Pseudomorphic High Electron Mobility Transistors (PHEMTs) Nawaz M / Ng G I, Singapore
Study of Spacer Architecture and Current Leakage Aspects of Sub-micron Self-aligned Silicide Process Lim C W / Lahiri S K / Pey K L / Lee K H / Wong H / Chhagan V N / Tan P S / Chiu W H / Chan L, Singapore
Characteristics of ECR-CVD Low Dielectric Constant Fluorinated Silicon Oxide (FxSiOy) by Using Indirect Fluorinating Precursor CF4 Chang K M / Wang S W / Wu C J / Yeh T H / Li C H / Yang J Y, Taiwan
Integration of Nitrogen lon-Implantation into Sub-micron CMOS Device Fabrication Process Lim C W / Lahiri S K / Wong H / Pey K L / Lee K H / Wong S M / Chan L, Singapore
Reduction of RSCE by Nitrogen Implantation and Interchanging of Current Processes Lee T K / Liu P C / Zhang Y Q / Gan C H, Singapore
Session A8	Day Friday	Time 16:30 – 18:00	Room VANDA III
Device & IC Technology VIII (Testing) Chaired by Mr Tse Man Siu
A Comparative Study of TEOS-Based Chemical Vapor Deposition Techniques for Shallow Trench Isolation Technology Sudijono J L / Vladislav Y / Vassiliev V Y / Zheng J Z, Singapore
Characterization of Surface Defects in the Sub Atmospheric Pressure-CVD Borophosphosilicate Glass Film on Silicon Wafer Tang S K / Mridha S / Vassiliev V Y / Zheng J Z / Chan L, Singapore
A Preparation to Fabricate Basic Long Wavelength Optical Devices Using LPE Tamsir A S / Hartanto D / Yumin S E / Siregar M R T, Indonesia
Hot Carrier Degradation of 0.7m m Buried Channel Lightly Doped Drain (LDD) pMOSFETs : A Charge Pumping Study Wong T K S / Chua K T / Tan P W / Tse M S, Singapore
Optimum Probing Sequences for Fault-Node Location Derived from Dependency Trees Hunger A / Papathanasiou A / Zumbragel J, Germany
Effects of Transistor Casing on Output Performance of Transistor Circuits Miao Q H / Zhang D H / Wang J J / Shi W / Xia C Y, Singapore
Session B10	Day Friday	Time 16:30 – 18:00	Room MAGNOLIA I
Integrated Circuits and Systems X Chaired by Mr Lau Kim Teen
ASIC Control System for Electric Drives Cirstea M N, United Kingdom
A New Approach to Fractional – N Frequency Synthesis Jamuar S S / Mariun N, Malaysia
A New Phase Frequency Detector with Feedforward Reset for Low Supply Voltage  Yoshizawa H / Taniguchi K / Nakashi K / Shirahama H, Japan
New Array Processor Architecture for MPEG2 Motion Estimation Li D J / Kunieda H, Japan
Direct Tuning Scheme in Continuous-Time Biquad Filter with Operational Transconductance Amplifiers  Noerbambang I S / Kunieda H, Indonesia
A Novel Four Quadrant Current Mode Analog Multiplier Mittal R / Jamuar S S, Malaysia
A Cost-Driven Chip Partitioning Approach for Multi-Chip Modules Wichlund S / Aas E J, Norway
Session C6	Day Friday	Time 16:30 – 18:00	Room MAGNOLIA II
Design Automation VI (Synthesis and Optimization) Chaired by Mr Siek Liter
An Automated Design Methodology for the Mapping of DSP Algorithms into Low Power VLSI Architectures Heubi A / Balsiger P / Pellandini F, Switzerland
Circuit Performance and Yield Optimization with Worst-Case and Monte Carlo Analyses Cheah S L / Zhuang W J / Kong T / Gao Q, Singapore
A Modelling Approach for Non-Linear Analogue Circuits Enright D / Mack R J, United Kingdom
A System Design Approach to the RPE-LTP Speech Codec Vihavainen K / Saastamoinen I / Isoaho J, Finland
Re-use Intellectual Property (IP) Through Rapid Re-layout of Existing Integrated Circuits to Latest Process Rules Rohr P, USA
Session C7	Day Friday	Time 16:30 – 18:00	Room HIBISCUS
Design Automation VII (High Level Description and Physical Design) Chaired by Dr Falkowski, Bogdan
Layout-Driven Synthesis for Submicron Technology : Mapping Expansions to Regular Lattices Perkowski M A / Pierzchala E / Drechsler R, USA
New Design Approach for Ultrafast GaAs Analog-to-Digital Converter  Singh J / Zayegh A / Kalam A / Malyniak R, Australia
ALDA2 : A New Approach to Analogue Layout Generation Bensouiah D A / Enright D / Mack R J / Massara R E, United Kingdom
Track Assignment Algorithm for an FPGA with Hierarchical Interconnection Structure Wang P T / Tang J J / Chou K C, Taiwan
An Improvement Algorithm on General Connectivity Computation for VLSI Placement Shen Z X / Song J / Zhuang W J, Singapore
Auto-Generator for FPGA-XILINX to VLSI-MAGIC Conversion Srikanthan T / Clarke C T / Lam S K / Wee L C, Singapore
Modelling of a Microcomputer in VHDL Jong C C / Toh G N / Chua B L F / Chong L K, Singapore