Proc. of the 7th International Symposium on IC Technology, Systems & Applications (ISIC-97)

Singapore, September 10-12, 1997, pp. 235-238.

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Analytical equations for the threshold voltage of MOS transistors are formulated based on 2-D process and device simulations of a 2-µm CMOS process, which incorporate the dependence of the threshold voltage on the threshold implant dose and gate oxidation time. An effective substrate doping is defined and formulated based on the theoretical definition and the simulated threshold voltage, which can be used in predicating threshold voltages based on theoretical equations. The threshold voltage expressions such formulated include the effects of nonuniform doping profiles and nonlinear carrier transport, and yet are compact and efficient to use. The approach also illustrates a general method in formulating higher-level compact models based on more detailed lower-level models, which is critical in modeling deep-submicron devices.