Architecture-Aware Algorithms for Edge Intelligence

International Refereed Journals

  1. Siew-Kei Lam, Teck Chuan Lim, Meiqing Wu, Bin Cao, and Bhavan A. Jasani, “Data-path Unrolling with Logic Folding for Area-Time Efficient FPGA-based FAST Corner Detector”, Journal of Real-Time Image Processing, Vol. 16, No. 6, December 2019, pp 2147–2158 [PDF]
  2. Thinh Hung Pham, Phong Tran, Siew-Kei Lam, “High-Throughput and Area-Optimized Architecture for rBRIEF Feature Extraction”, IEEE Transactions on Very Large Scale Integration System, Vol. 27, No. 4, April 2019, pp. 747-756 [PDF]
  3. Siew-Kei Lam, Guiyuan Jiang, Meiqing Wu, Bin Cao, “Area-Time Efficient Streaming Architecture for FAST and BRIEF Detector”, IEEE Transactions on Circuits and Systems II, Vol. 66, No. 2, February 2019, pp. 282-286 [PDF]
  4. Bhavan A. Jasani, Siew-Kei Lam, Pramod K. Meher, and Meiqing Wu, “Threshold-Guided Design and Optimization for Harris Corner Detector Architecture”, IEEE Transactions on Circuits and Systems for Video Technology, Vol. 28, No. 12, December 2018, pp. 3516-3526 [PDF]
  5. Siew-Kei Lam, Teck Chuan Lim, Meiqing Wu, Bin Cao, Bhavan A. Jasani, “Area-Time Efficient FAST Corner Detector using Data-path Transposition”, IEEE Transactions on Circuits and Systems II, Vol. 65, No. 9, September 2018, pp. 1224-1228 [PDF]
  6. Nirmala Ramakrishnan, Meiqing Wu, Siew-Kei Lam, and Thambipillai Srikanthan, “Enhanced Low-Complexity Pruning for Corner Detection”, Journal of Real-Time Image Processing, Vol. 2, No. 1, June 2016, pp. 197-213 [PDF]
  7. Bo Liu, Siew-Kei Lam, Thambipillai Srikanthan and Weiqi Yuan, “Iris Recognition Using Stable Dark Features”, Journal of Computers: Special Issue on Parallel Architecture, Algorithms and Programming, Vol. 8 No. 1, January 2013
  8. Bo Liu, Siew-Kei Lam, Thambipillai Srikanthan and Weiqi Yuan, “Iris Recognition of Defocused Images for Mobile Phones", International Journal of Pattern Recognition and Artificial Intelligence, Vol. 26, No. 8, 1260010, December 2012 [PDF]
  9. S. Suchitra, S.K. Lam, C.T. Clarke and T. Srikanthan, “Accelerating Rotation of High-Resolution Images", IEE Proceedings on Vision, Image and Signal Processing, Vol. 153, No. 6, December 2006, pp. 815-824 [PDF]

    10. International Refereed Conferences/Workshops

    1. Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew Kei Lam and Meiqing Wu, “Reducing Dynamic Power in Streaming CNN Hardware Accelerators by Exploiting Computational Redundancies”, Field Programmable Logic and Applications (FPL), September 2019 [Barcelona, Spain] [PDF]
    2. Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew Kei Lam and Meiqing Wu, “Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator”, IEEE 21st International Workshop on Multimedia Signal Processing (MMSP), September 2019 [Kuala Lumpur, Malaysia] [PDF]
    3. Phong Tran, Thinh Hung Pham, Siew-Kei Lam, Meiqing Wu, and Bhavan A. Jasani, “Stream-based ORB Feature Extractor with Dynamic Power Optimization”, International Conference on Field-Programmable Technology (ICFPT), December 2018 [Okinawa, Japan] [PDF]
    4. Siew-Kei Lam, Rakesh Kumar Bijarniya, and Meiqing Wu, “Lowering Dynamic Power in Stream-based Harris Corner Detection Architecture”, International Conference on Field-Programmable Technology (ICFPT), December 2017 [Melbourne, Australia] [PDF]
    5. Kadiyala Sai Praveen, Vikram Pudikumar and Siew-Kei Lam, “Approximate Compressed Sensing for Hardware-Efficient Image Compression”, IEEE International System-on-Chip Conference (SOCC), September 2017 [Munich, Germany] [PDF]
    6. Nirmala Ramakrishnan, Thambipillai Srikanthan, Siew-Kei Lam and Gauri Tulsulkar, “Adaptive Window Strategy for High Speed and Robust KLT Feature”, Pacific Rim Symposium on Image and Video Technology (PSIVT), November 2015
    7. Nirmala Ramakrishnan, Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan, “Mask-based Non-Maximal Suppression with Iterative Pruning for Low Complexity Corner Detection”, International Symposium on Integrated Circuits (ISIC), December 2014, pp. 368-371 [PDF]
    8. Nirmala Ramakrishnan, Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan, “Automated Thresholding for Low Complexity Corner Detection”, NASA/ESA Conference on Adaptive Hardware and Systems, 2014, pp. 97-103 [PDF]
    9. Gaurav Mishra, Yan Lin Aung, Meiqing Wu, Siew-Kei Lam and Thambipillai Srikanthan, “Real-Time Image Resizing Hardware Accelerator for Object Detection Algorithms", 4th International Symposium on Electronic System Design (ISED), December 2013, pp. 98-102 [PDF]
    10. Meiqing Wu, Nirmala Ramakrishnan, Siew-Kei Lam and Thambipillai Srikanthan, "Low-Complexity Pruning for Accelerating Corner Detection", IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, pp. 1684-1687 [PDF]
    11. Bo Liu, Siew-Kei Lam, Thambipillai Srikanthan and Weiqi Yuan, "Exploiting Stable Features for Iris Recognition of Defocused Images", IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, pp. 97-100 [PDF]
    12. Bo Liu, Siew-Kei Lam, Thambipillai Srikanthan and Weiqi Yuan, "Utilizing Dark Features for Iris Recognition in Less Constrained Environments", 4th International Symposium on Parallel Architecture, Algorithms and Programming (PAAP), December 2011, pp. 110-114
    13. Song Y., Siew-Kei Lam and Srikanthan T., “An Efficient Edge and Corner Detector”, 11th International Conference on Control, Automation, Robotics and Vision (ICARV), December 2010, pp. 1628-1631
    14. Sathyanarayana S., S.K. Lam and Srikanthan T., “Novel Schemes for High-Throughput Image Rotation”, Asilomar Conference on Signals, Systems, and Computers, Vol. 2, November 2004, pp.1884-1888
    15. Sathyanarayana S., S.K. Lam and Srikanthan T., “High-Throughput Image Rotation Using Sign-Prediction Based Redundant CORDIC Algorithm”, IEEE International Conference on Image Processing (ICIP), Vol. 4, October 2004, pp. 2833-2836 [PDF]

      16. Embedded Vision for Automotive and Traffic Management

      International Refereed Journals

      1. Chengju Zhou, Meiqing Wu, and Siew-Kei Lam, "Group Cost-sensitive BoostLR with Vector Form Decorrelated Filters for Pedestrian Detection", IEEE Transactions on Intelligent Transportations Systems [Accepted]
      2. Meiqing Wu, Siew-Kei Lam, and Thambipillai Srikanthan, “A Framework for Fast and Robust Visual Odometry”, IEEE Transactions on Intelligent Transportation Systems, Vol. 18, No. 12, December 2017, pp. 3433-3448 [PDF]
      3. Meiqing Wu, Siew-Kei Lam, and Thambipillai Srikanthan, “Non-Parametric Technique Based High-Speed Road Surface Detection”, IEEE Transactions on Intelligent Transportation Systems, Vol. 16, No. 2, 2015, pp. 874-884 [PDF]

        4. International Refereed Conferences/Workshops

        1. Gaurav Singh, Meiqing Wu and Siew-Kei Lam, "Fusing Semantics and Motion State Detection for Robust Visual SLAM”, IEEE Winter Conference on Applications of Computer Vision (WACV), March 2020 [Colorado] [PDF]
        2. Sirin Haddad and Siew-Kei Lam, “Self-Growing Spatial Graph Networks for Pedestrian Trajectory Prediction”, IEEE Winter Conference on Applications of Computer Vision (WACV), March 2020 [Colorado] [PDF]
        3. Duvindu Piyasena, Sathursan Kanagarajah, Siew-Kei Lam and Meiqing Wu, "Lifelong Learning with Regularization and DataAugmentation”, IEEE/RSJ International Conference on Intelligent Robots and Systems, November 2019 [Macau, China] [PDF]
        4. Gaurav Singh, Meiqing Wu and Siew-Kei Lam, “Revisiting Visual Odometry for Real-Time Performance”, International Conference on Machine Vision Applications (MVA), May 2019 [Tokyo, Japan] [PDF]
        5. Sirin Haddad, Meiqing Wu, He Wei and Siew-Kei Lam, “Situation-Aware Pedestrian Trajectory Prediction with Spatio-Temporal Attention Model”, 24th Computer Vision Winter Workshop (CVWW), February 2019 [Austria] [PDF]
        6. Chengju Zhou, Meiqing Wu and Siew-Kei Lam, “Fast and Accurate Pedestrian Detection using Dual-Stage Group Cost-Sensitive RealBoost with Vector Form Filters”, 25th ACM Multimedia (MM), October 2017 [California, USA] [PDF]
        7. Chengju Zhou, Meiqing Wu and Siew-Kei Lam, “Group Cost-sensitive Boosting with Multi-scale Decorrelated Filters for Pedestrian Detection”, 28th British Machine Vision Conference (BMVC), September 2017 [London, UK] [PDF]
        8. Kratika Garg, Vedika Agarwal, Siew-Kei Lam and Thambipillai Srikanthan, “Real-time Road Traffic Density Estimation using Block Variance”, IEEE Winter Conference on Applications of Computer Vision (WACV), March 2016, pp. 1-9 [New York, USA] [PDF]
        9. Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan, “Vision-based Pedestrian Tracking System using Color and Motion Cue”, International Symposium on Integrated Circuits (ISIC), December 2014, pp. 372-375
        10. Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan, “Stereo-based ROIs Generation for Detecting Pedestrians in Close Proximity”, International Conference on Intelligent Transportation Systems (ITSC), October 2014, pp. 1929-1934 [PDF]

          11. Smart Urban Mobility Systems

          International Refereed Journals

          1. Guiyuan Jiang , Siew-Kei Lam, Fangxin Ning, Peilan He, and Jidong Xie, “Peak-Hour Vehicle Routing for First-Mile Transportation: Problem Formulation and Algorithms”, IEEE Transactions on Intelligent Transportation Systems [Accepted]
          2. Peilan He, Guiyuan Jiang, Siew-Kei Lam, and Yidan Sun, “Learning Heterogeneous Traffic Patterns for Travel Time Prediction of Bus Journeys”, Information Sciences, Vol. 512, February 2020, pp. 1394-1406 [PDF]
          3. Peilan He, Guiyuan Jiang, Siew-Kei Lam, and Dehua Tang, “Travel Time Prediction of Bus Journey with Multiple Bus Trip”, IEEE Transactions on Intelligent Transportation Systems, Vol. 20, No. 11, November 2019 [PDF]
          4. S.K. Lam, K. Sridharan and T. Srikanthan, “VLSI-Efficient Schemes for High-Speed Construction of Tangent Graph", Journal of Robotics and Autonomous Systems, Vol. 51, No. 4, June 2005, pp. 248-260 [PDF]
          5. Lam Siew Kei, K. Sridharan and T. Srikanthan, “Hardware Efficient Schemes for Logarithmic Approximation and Binary Search with Application to Visibility Graph Construction", IEEE Transactions on Industrial Electronics, Vol. 51, No. 6, December 2004, pp. 1346-1348
          6. S.K. Lam and T. Srikanthan, “Environment Modelling for Robot Navigation Using VLSI-Efficient Logarithmic Approximation Method", Journal of Intelligent & Robotic Systems, Vol. 35, No. 1, September 2002, pp. 23-40
          7. S.K. Lam and T. Srikanthan, “High-Speed Environment Representation Scheme for Dynamic Path Planning", Journal of Intelligent & Robotic Systems, Vol. 32, No. 3, November 2001, pp. 307-319
          8. L.S. Kei and T. Srikanthan, “Dynamic Multicast Routing in VLSI", Journal of Computer Communications, Vol. 23, No. 11, June 2000, pp. 1055-1063

            9. International Refereed Book Chapters

            1. K. Sridharan, Lam Siew Kei and T. Srikanthan, “VLSI Architectures for Autonomous Robots – A Review", Autonomous Robots Research Advances, Nova Publishers, May 2008, pp. 105-120

            International Refereed Conferences/Workshops

            1. Peilan He, Yidan Sun, Guiyuan Jiang, Siew-Kei Lam, “Predicting Travel Time of Bus Journeys with Alternative Bus Services”, 19th IEEE International Conference on Data Mining Workshop (ICDMW), November 2019 [Accepted]
            2. Yidan Sun, Guiyuan Jiang, Siew-Kei Lam, Shicheng Chen and Peilan He, “Bus Travel Speed Prediction using Attention Network of Heterogeneous Correlation Features”, SIAM International Conference on Data Mining (SDM), May 2019 [Calgary, Canada] [PDF]
            3. Siew-Kei Lam and Srikanthan T., “Accelerating Shortest Path Computations in Hardware”, IEEE Conference on Automation Science and Engineering (CASE), August 2010, pp. 63-68
            4. S.K. Lam, Srikanthan T. and Leow K.H., “Efficient Memory Structures for Dynamic Multicast Routing Architecture”, 4th International Symposium on Communication Systems, Networks and Digital Signal Processing (CSNDSP), July 2004, pp. 600-603
            5. Quek K.H., S.K. Lam, Agrawal N.K. and Srikanthan T., “Architectural Design and Analysis Toolbox to Implement Shortest Path Algorithms in Hardware”, IEEE International Symposium on Circuits and Systems (ISCAS), Vol. 3, May 2003, pp. 224-227
            6. S.K. Lam and Srikanthan T., “Accelerating the K-Shortest Paths Computation in Multimodal Transportation Networks”, IEEE 5th International Conference on Intelligent Transport Systems (ITSC), September 2002, pp. 491-495

              7. Secure and Reliable Embedded Systems

              International Refereed Journals

              1. Changhai Ou, Chengju Zhou, and Siew-Kei Lam, “A First Study of Compressive Sensing for Side-Channel Leakage Sampling”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems [Accepted]
              2. Yidan Sun, Guiyuan Jiang, Siew-Kei Lam, and Fangxin Ning, “Designing Energy-Efficient MPSoC with Untrustworthy 3PIP Cores”, IEEE Transactions on Parallel and Distributed Systems, Vol. 31, No. 1, January 2020, pp. 51-63 [PDF]
              3. Saru Vig, Rohan Juneja, Guiyuan Jiang, Siew-Kei Lam, and Changhai Ou, “A Framework for Fast Memory Authentication using Dynamically Skewed Integrity Tree”, IEEE Transactions on Very Large Scale Integration System, Vol. 27, No. 10, October 2019 [PDF]
              4. Jigang Wu, Yalan Wu, Guiyuan Jiang and Siew-Kei Lam, “Algorithms for Reconfiguring NoC-based Fault-Tolerant Multiprocessor Arrays”, Journal of Circuits, Systems and Computers, 2019 [PDF]
              5. Jigang Wu, G. Jiang, Y. Shen, Siew-Kei Lam, J. Sun and T. Srikanthan, “Parallel Reconfiguration Algorithms for Mesh-connected Processor Arrays”, Journal of Supercomputing, Vol. 69. No. 2, August 2014, pp. 610-628 [PDF]

              International Refereed Conferences/Workshops

              1. Saru Vig, Rohan Juneja, and Siew-Kei Lam, “DISSECT: Dynamic Skew-and-Split Tree for Memory Authentication", Design, Automation and Test in Europe (DATE), March 2020 [Accepted]
              2. Alexander Fell, Hung Thinh Pham, Siew-Kei Lam, “TAD: Time Side-Channel Attack Defense of Obfuscated Source Code”, 24th Asia and South Pacific Design Automation Conference (ASP-DAC), January 2019 [Tokyo, Japan] [PDF]
              3. Manaar Alam, Debdeep Mukhopadhyay, Sai Praveen Kadiyala, Siew-Kei Lam and Thambipillai Srikanthan, “Side-Channel Assisted Malware Classifier with Gradient Descent Correction for Embedded Platforms”, 7th International Workshop on Security Proofs for Embedded Systems (PROOFS), Vol. 7, September 2018, pp. 1-15 [PDF]
              4. Thinh Hung Pham, Alexander Fell, Arnab Kumar Biswas, Siew-Kei Lam, and Nandeesha Veeranna, “CIDPro: Custom Instructions for Dynamic Program Diversification”, Field Programmable Logic and Applications (FPL), August 2018, [PDF]
              5. Saru Vig, Sarani Bhattacharya, Debdeep Mukhopadhyay and Siew-Kei Lam, “Rapid Detection of RowHammer Attacks using Dynamic Skewed Hash Tree", Hardware and Architectural Support for Security and Privacy (HASP@ISCA), June 2018 [PDF]
              6. Saru Vig, Guiyuan Jiang, and Siew-Kei Lam, “Dynamic Skewed Tree for Fast Memory Integrity Verification", Design, Automation and Test in Europe (DATE), March 2018, pp. 642-647 [PDF]
              7. Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Rohith R., Siew-Kei Lam, and Muhammad Shafique, "HIMAP: A Hierarchical Mapping Approach for Enhancing Lifetime Reliability of Dark Silicon Manycore Systems", Design Automation and Test Europe (DATE), March 2018, pp. 991-996
              8. Rohith R, Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Siew-Kei Lam, "LifeSim: A Lifetime Reliability Simulator for Manycore Systems", 8th IEEE Annual Computing and Communication Workshop and Conference (CCWC), January 2018
              9. Saru Vig, Tan Yng Tzer, Guiyuan Jiang, and Siew-Kei Lam, “Customizing Skewed Trees for Fast Memory Integrity Verification in Embedded Systems", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2017, pp. 213-218 [PDF]
              10. Jigang Wu, Ningjing Liu, Siew-Kei Lam and Guiyuan Jiang, “Shortest Partial Path First Algorithm for Reconfigurable Processor Array with Faults”, 14th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA), August 2016, pp. 1198-1203 [PDF]
              11. Xu Wang, Jigang Wu, Guiyuan Jiang, Siew-Kei Lam, Thambipillai Srikanthan, "Fast Replica Placement and Update Strategies in Tree Networks", IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid), May 2015, pp. 915-920
              12. Yuanbo Zhu, Jigang Wu, Siew-Kei Lam and T. Srikanthan, “Preprocessing Technique for Accelerating Reconfiguration of Degradable VLSI Arrays", IEEE International Symposium on Circuits and Systems (ISCAS), May 2013, pp. 2424-2427
              13. Yuanbo Zhu, Jigang Wu, Siew-Kei Lam and T. Srikanthan, “Reconfiguration Algorithms for Degradable VLSI Arrays with Switch Faults", IEEE International Conference on Parallel and Distributed Systems (ICPADS), Singapore, December 2012, pp. 356-361 [PDF]

              Collaborative Edge-Cloud Computing

              International Refereed Journals

              1. Zikai Zhang, Jigang Wu, Long Chen, Guiyuan Jiang, and Siew-Kei Lam, "Collaborative Task Offloading with Computation Result Reusing for Mobile Edge Computing", The Computer Journal, April 2019 [PDF]
              2. Longting Zhu, Jigang Wu, Guiyuan Jiang, Long Chen, and Siew-Kei Lam, “Efficient Hybrid Multicast Approach in Wireless Data Center Network”, Future Generation Computer Systems, Vol. 83, June 2018, pp. 27-36
              3. Guiyuan Jiang, Siew-Kei Lam, Yidan Sun, Lijia Tu and Jigang Wu, “Joint Charging Tour Planning and Depot Positioning for Wireless Sensor Networks using Mobile Chargers”, IEEE/ACM Transactions on Networking, Vol. 25, No. 4, August 2017, pp. 2250-2266

              ARCTIC: Architecture-Aware Custom Instructions

              International Refereed Journals

              1. Siew-Kei Lam, Christopher T. Clarke, and Thambipillai Srikanthan, “Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration”, ACM Transactions on Reconfigurable Technology and Systems, Vol. 7, No. 3, Article 26, November 2014 [PDF]
              2. Siew-Kei Lam, Thambipillai Srikanthan and Christopher T. Clarke, “Rapid Evaluation of Custom Instruction Selection Approaches with FPGA Estimation”, ACM Transactions on Embedded Computing Systems, Vol. 13, No. 4, Article 75, August 2014 [PDF]
              3. Alok Prakash, Siew-Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan, “FPGA-Aware Techniques for Rapid Generation of Profitable Custom Instructions”, Microprocessors and Microsystems, Vol. 37, No. 3, May 2013, pp 259–269
              4. Siew-Kei Lam, Thambipillai Srikanthan and Cristopher T. Clarke, “Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs", IEEE Transactions on Computers, Vol. 60, No. 5, May 2011, pp. 680-692 [PDF]
              5. Tao Li, Wu Jigang, Siew-Kei Lam, Thambipillai Srikanthan and Xicheng Lu, “Selecting Profitable Custom Instructions for Reconfigurable Processors", Journal of Systems Architecture (Special Issue on HW/SW Co-Design: Tools and Applications), Vol. 56, No. 8, August 2010, pp. 340-351 [PDF]
              6. Siew-Kei Lam, Thambipillai Srikanthan T and Christopher T. Clarke, “Selecting Profitable Custom Instructions for Area-Time-Efficient Realization on Reconfigurable Architectures", IEEE Transactions on Industrial Electronics, Vol. 56, No. 10, October 2009, pp. 3998-4005 [PDF]
              7. Siew-Kei Lam and Thambipillai Srikanthan, “Rapid Design of Area-Efficient Custom Instructions for Reconfigurable Embedded Processing", Journal of Systems Architecture, Vol. 55, No. 1, January 2009, pp. 1-14 [PDF]
              8. Siew-Kei Lam, Thambipillai Srikanthan and Christopher T. Clarke, “Rapid Generation of Custom Instructions Using Predefined Dataflow Structures", Microprocessors and Microsystems (Special Issue on FPGA-based Reconfigurable Computing), Vol. 30, No. 6, September 2006, pp. 355-366 [PDF]

              International Refereed Conferences/Workshops

              1. Deshya Wijesundera, Alok Prakash, Siew Kei Lam, and Thambipillai Srikanthan, “Exploiting Configuration Dependencies for Rapid Area-efficient Customization of Soft-core Processors”, 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES), May 2016, pp. 163-172
              2. Alok Prakash, Christopher T. Clarke, Siew-Kei Lam and Thambipillai Srikanthan, “Modelling the Communication Overhead of Using Local Memory Blocks”, 24th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), June 2013, pp. 31-34
              3. Siew-Kei Lam, Thambipillai Srikanthan and Christopher T. Clarke, "Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration", 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, July 2012 [PDF]
              4. Alok Prakash, Siew-Kei Lam, Christopher T. Clarke and Thambipillai Srikanthan, "Instruction Set Customization for Area-Constrained FPGA Designs", IEEE International SoC Conference (SOCC), September 2011
              5. Siew-Kei Lam, Deng Y., Hu J., Zhou X. and Srikanthan T., “Hierarchical Loop Partitioning for Rapid Generation of Runtime Configurations”, Lecture Notes in Computer Science (LNCS), Springer-Verlag, Berlin Heidelberg: Reconfigurable Computing: Architectures, Tools and Applications, Vol. 5992/2010, 2010, pp. 282-293 [PDF]
              6. Prakash A., Siew-Kei Lam, Singh A.K. and Srikanthan T., “Architecture-Aware Custom Instruction Generation for Reconfigurable Processors”, Lecture Notes in Computer Science (LNCS), Springer-Verlag, Berlin Heidelberg: Reconfigurable Computing: Architectures, Tools and Applications, Vol. 5992/2010, 2010, pp. 414-419
              7. Siew-Kei Lam, Bharathi N. Krishnan and Thambipillai Srikanthan, “Efficient Management of Custom Instructions for Run-Time Reconfigurable Instruction Set Processors", IEEE International Conference on Field-Programmable Technology (ICFPT), December 2006
              8. Siew-Kei Lam, Deng Yun and Thambipillai Srikanthan, “Morphable Structures for Reconfigurable Instruction Set Processors", Lecture Notes in Computer Science (LNCS), Springer-Verlag, Berlin Heidelberg: Advances in Computer Systems Architecture, Vol. 3740, pp. 450-463 (Tenth Asia-Pacific Computer Systems Architecture Conference (ACSAC), October 2005 [PDF]

              CAPRI: Constraint-Aware Hardware-Software Partitioning

              International Refereed Journals

              1. Wenjun Shi, Jigang Wu, Siew-Kei Lam, and Thambipillai Srikanthan, “Algorithms for Bi-objective Multiple-choice Hardware/Software Partitioning”, Computers and Electrical Engineering, Vol. 50, Issue C, February 2016, pp. 127-142 [PDF]
              2. Guiyuan Jiang, Jigang Wu, Siew-Kei Lam, Thambipillai Srikanthan and Jizhou Sun, “Algorithmic Aspects of Graph Reduction for Hardware/Software Partitioning”, Journal of Supercomputing, Vol. 71, No. 6, June 2015, pp. 2251-2274 [PDF]
              3. Yan Lin Aung, Siew-Kei Lam, and Thambipillai Srikanthan, “Addressing Productivity Challenges in Domain Specific Reconfigurable Platforms: A Case Study on EKF-based Motor Control”, Journal of Low Power Electronics, Vol. 10, No 3, September 2014, pp. 455-466
              4. Jigang Wu, Pu Wang, Siew-Kei Lam, Thambipillai Srikanthan, “Efficient Heuristic and Tabu Search for Hardware/Software Partitioning", The Journal of Supercomputing, Vol. 66, No. 1, October 2013, pp. 118-134 [PDF]

              International Refereed Conferences/Workshops

              1. Kratika Garg, Yan Lin Aung, Siew-Kei Lam, and Thambipillai Srikanthan, "KnapSim - Run-time Efficient Hardware-Software Partitioning Technique for FPGA", IEEE International System-on-Chip Conference (SOCC), September 2015
              2. Wenjun Shi, Jigang Wu, Siew-Kei Lam, and Thambipillai Srikanthan, “Algorithmic Aspects for Bi-objective Multiple-choice Hardware/Software Partitioning”, International Symposium on Parallel Architectures, Algorithms and Programming (PAAP), July 2014, pp. 7-12
              3. Yan Lin Aung, Siew-Kei Lam and Thambipillai Srikanthan, “Hardware-Software Codesign of EKF-based Motor Control for Domain-Specific Reconfigurable Platform", 4th International Symposium on Electronic System Design (ISED), December 2013, pp. 93-97 [PDF]
              4. Yan Lin Aung, Siew-Kei Lam and Thambipillai Srikanthan, "Compiler-Assisted Technique for Rapid Performance Estimation of FPGA-Based Processors", IEEE International SoC Conference (SOCC), September 2011 [PDF]
              5. Aung Y.L., Siew-Kei Lam and Srikanthan T., “Performance Estimation Framework for FPGA-based Processors”, International Conference on Field-Programmable Technology (ICFPT), December 2010, pp. 413-416
              6. Prakash A., Siew-Kei Lam, Singh A.K. and Srikanthan T., “Rapid Design Exploration Framework for Application-Aware Customization of Soft Core Processors”, International Conference on Field Programmable Logic and Applications (FPL), August/September 2009, pp. 539-542

              CRATE: CHiPES Rapid Area-Time Estimator

              International Refereed Journals

              1. My Chuong Lieu, Siew-Kei Lam and Thambipillai Srikanthan, “Rapid Area-Time Estimation Technique for Porting C-Based Applications onto FPGA Platforms", Scalable Computing: Practice and Experience (Special Issue on High Performance Reconfigurable Computing), Vol. 8, No. 4, December 2007, pp. 359-371 [PDF]

                2. International Refereed Conferences/Workshops

                1. Yan Lin Aung, Siew-Kei Lam, and Thambipillai Srikanthan, "Rapid Estimation of DSPs Utilization for Efficient High-Level Synthesis”, International Conference on Digital Signal Processing (DSP), July 2015, pp. 1261-1265
                2. Yan Lin Aung, Siew-Kei Lam and Thambipillai Srikanthan, “Area-Time Estimation of C-based Functions for Design Space Exploration", International Conference on Field-Programmable Technology (ICFPT), December 2012
                3. Lieu My Chuong, Yan Lin Aung, Siew-Kei Lam, Thambipillai Srikanthan and Lim Chai Soon, "Automatic Compilation of C Applications for FPGA-based Hardware Acceleration", 4th International Symposium on Parallel Architecture, Algorithms and Programming (PAAP), December 2011, pp. 223-227 [PDF]
                4. Sinha S., Dhawan U., Lam S.K. and Srikanthan T., "A Novel Binding Algorithm to Reduce Critical Path Delay During High Level Synthesis", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2011, pp. 278-283
                5. Dhawan U., Sinha S., Siew-Kei Lam and Srikanthan T., “Extended Compatibility Path Based Hardware Binding Algorithm for Area-Time Efficient Designs”, Asia Symposium on Quality Electronic Design (ASQED), August 2010, pp. 151-156
                6. Lieu M.C., Siew-Kei Lam and Srikanthan T., “Area-Time Estimation of Controller for Porting C-Based Functions onto FPGA”, IEEE/IFIP International Symposium on Rapid System Prototyping (RSP), June 2009, pp. 145-151 [PDF]
                7. Lieu M.C., Siew-Kei Lam and Srikanthan T., “High-Level Delay Estimation Technique for Porting C-based Applications on FPGA”, IEEE International Symposium on Industrial Electronics (ISIE), June/July 2008, pp. 1991-1996

                Vision-Guided Endoscopy

                International Refereed Journals

                1. C.S. Lim, S.K. Lam, T. Srikanthan and H. Tian, “High Speed Segmentation of Endoscopic Images for Micro-Robotic Auto Navigation", International Journal of Humanoid Robotics, Vol. 3, No. 4, December 2006, pp. 523-545 [PDF]
                2. H. Tian, S.K. Lam and T. Srikanthan, “Area-Time Efficient Between-Class Variance Module for Adaptive Segmentation Process", IEE Proceedings on Vision, Image and Signal Processing, Vol. 150, No. 4, August 2003, pp. 263-269

                  3. International Refereed Conferences/Workshops

                  1. Pon Nidhya Elango and Siew-Kei Lam, “Bounded Iterative Thresholding for Lumen Region Detection in Endoscopic Images”, 14th International Conference on Control, Automation, Robotics and Vision (ICARV), November 2016 [PDF]
                  2. Tian H., S.K. Lam and Srikanthan T., “Implementing Otsu’s Thresholding Process Using Area-Time Efficient Logarithmic Approximation Unit”, IEEE International Symposium on Circuits and Systems (ISCAS), Vol. 4, May 2003, pp. 21-24
                  3. Tian H., S.K. Lam, Srikanthan T. and Chang C.H., “An Efficient Architecture for Adaptive Progressive Thresholding”, IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), Vol. 1, October 2002, pp. 513-516 [PDF]
                  4. Tian H., Srikanthan T., Asari K.V. and S.K. Lam, “Study on the Effect of Object to Camera Distance on Polynomial Expansion Coefficients in Barrel Distortion Correction”, IEEE Proceedings of the 5th Southwest Symposium on Image Analysis and Interpretation (SSIAI), April 2002 [PDF]

                    5. Computer Arithmetic

                    International Refereed Journals

                    1. T. Srikanthan T, S.K. Lam and Mishra Suman, “Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System", IEEE Transactions on Computers, Vol. 53, No. 1, January 2004, pp. 69-72
                    2. S.K. Lam and T. Srikanthan T, “A Linear-Approximation Based Hybrid Approach for Binary Logarithmic Conversion", Microprocessors and Microsystems, Vol. 26, No. 8, November 2002, pp. 353-361

                      3. International Refereed Conferences/Workshops

                      1. S.K. Lam, Chaudhary D.K. and Srikanthan T., “Low Cost Logarithmic Techniques for High Precision Computations”, IEEE International Symposium on Circuits and Systems (ISCAS), Vol. 5, May 2003, pp. 125-128
                      2. S.K. Lam, Srikanthan T., Goyal N. and Tyagi N., “Incorporating Area-Time Flexibility to a Binary Signed-Digit Adder”, IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), Vol. 1, October 2002, pp. 485-489