Final Year Projects Supervised
    2011/12
     
     
  1. Zhuoran Ge, "Numerical Investigation of GaN Transistors for High-Voltage/High-Power Applications," FYP A6176-111, Nanyang Technological University, 2011/12.

    2.  
  2. Goh Mei Hui June, "Numerical Simulation of High-Temperature Effects of SOI MOSFETs," FYP A6175-111, Nanyang Technological University, 2011/12.

    3.  
  3. Tng Jing Hua Michelle, "Device Parameter Extraction for SOI MOSFETs in High-Temperature Operations," FYP A6172-111, Nanyang Technological University, 2011/12.
    2010/11
     
  1. Samuel Choon Wee Neo, "Simulation and Optimization of Tunneling Field-Effect Transistors (TFETs)," FYP A6205-101, Nanyang Technological University, 2010/11.

    2.  
  2. Sudhanshu Ahuja, "Performance Comparisons of Ultra-Thin-Body SOI and Double-Gate/Gate-All-Around MOSFETs," FYP A6191-101, Nanyang Technological University, 2010/11.

    3.  
  3. Poh Kay Dee, "2D & 3D TCAD-based Compact Modeling for Advanced CMOS Transistors," FYP B6193-101, Nanyang Technological University, 2010/11.
    2008/09
     
  1. Y. Zhang, "Numerical Studies of Schottky-Barrier MOSFETs," FYP A6185-081, Nanyang Technological University, 2008/09.

    2.  
  2. J. X. Chen, "Performance Comparisons of Ultra-Thin-Body SOI and Double-Gate MOSFETs," FYP A6187-081, Nanyang Technological University, 2008/09.

    3.  
  3. Y. Yu, "Numerical Exploration of Charge/Capacitance in Double-Gate/Nanowire MOSFETs," FYP A6188-081, Nanyang Technological University, 2008/09.
    2007/08
     
  1. Z. X. Qiu, "Numerical Exploration of Asymmetrical MOSFETs," FYP A6176S, Nanyang Technological University, 2007/08.

    2.  
  2. L. G. Yu, "Numerical Studies of Silicon Nanowire GAA MOSFETs," FYP A6175S, Nanyang Technological University, 2007/08.
    2006/07
     
  1. W. Huang, "Numerical Studies of Ultra-Thin Body SOI MOSFETs," FYP A6152S, Nanyang Technological University, 2006/07.

    2.  
  2. X. Q. Shi and T. Gou, "Numerical Exploration of Multiple-Gate MOSFETs," FYP A6151, Nanyang Technological University, 2006/07.
    2005/06
     
  1. G. J. Zhu and F. Li, "Framework Implementation of Design and Optimization of Ultra-Small Transistors," FYP A6099, Nanyang Technological University, 2005/06.

    2.  
  2. S. X. Wang and C. Q. Wei, "Numerical Simulation of Double-Gate MOSFETs," FYP E6098, Nanyang Technological University & Institute of Microelectronics, 2005/06.
2004/05
  1. S. Kumar and C. B. Teng, "Statistical Process Control and Monitoring for Deep-Submicron CMOS Technology Using Compact Models and Numerical Simulations," FYP B6110, Nanyang Technological University, 2004/05.

    2.  
  2. F. Lu and F. Pan, "Unified Compact Model Implementation for Deep-Submicron MOSFET Circuit Simulation," FYP A6111, Nanyang Technological University, 2004/05.
    2002/03
     
  1. H. K. Tay and C. C. Tan, "Compact Model Approach to Statistical Process Control for Deep-Submicron CMOS Technology," FYP B6085, Nanyang Technological University, 2002/03.

    2.  
  2. J. Wang and Z. Zhao, "Capacitance Modelling and Simulation for Deep-Submicron MOSFETs," FYP B6086, Nanyang Technological University, 2002/03.
    2000/01
     
  1. Y. M. Soh and K. Y. Kam, "TCAD-Synthesis Approach to Deep-Submicron MOSFET Design and Optimization," FYP C6079, Nanyang Technological University, 2000/01. View Report in PDF View Slide in PDF
    1998/99
     
  1. C. T. Tan and K. M. Tham, "Design and Optimisation of Ultra-Small Transistors," FYP I6075, Nanyang Technological University, 1998/99.

    2.  
  2. N. Nagappan and S. Pradip, "SUPREM Process Model Parameter Calibration," FYP I6076, Nanyang Technological University, 1998/99.
    1996/97
     
  1. C. H. Chuah and H. G. Lim, "Device Modeling and Characterization with TCAD for MMIC Applications," FYP I6066, Nanyang Technological University, 1996/97.

    2.  
  2. W. B. Loh and K. C. Tee, "Numerical Characterization of Optoelectronic Devices," FYP I6065, Nanyang Technological University, 1996/97.

    3.  
  3. K. Y. Lim and G. Y. Chong, "Virtual Wafer Fabrication," FYP I6064, Nanyang Technological University, 1996/97.

    4.  
  4. L. T. Lam and H. C. Ng, "Circuit Modeling and Parameter Extraction for MMIC Applications," FYP I6063, Nanyang Technological University, 1996/97.

    5.  
  5. K. C. Ng and M. H. Ng, "Library Development for Mixed Analog–Digital Circuit Simulation," FYP 6062, Nanyang Technological University, 1996/97.
    1995/96
     
  1. L. S. Seah and C. J. Yap, "Semiconductor Device Characterization with TCAD," FYP I6080, Nanyang Technological University, 1995/96.

    2.  
  2. C. K. Hung and C. S. Kang, "A Critical Study of SPICE Models for Digital and Analog Circuit Simulation," FYP I6079, Nanyang Technological University, 1995/96.
    1994/95
     
  1. S. C. Tan and S. W. Tan, "Simulated Device Fabrication and Characterization Process," FYP I2141, Nanyang Technological University, 1994/95.

    2.  
  2. T. K. Chew and K. K. Chia, "SPICE Model Implimentation for Circuit Simulation," FYP 2140, Nanyang Technological University, 1994/95.