This project is directed towards the application of compact models (CM) to the analysis and prediction of deep-submicron (DSM) CMOS electrical characteristics due to process variations. CM parameters are to be extracted from measured or numerically simulated electrical data, from which device performance variations will be studied by changing process variables. A systematic approach to statistical process control and monitoring will be developed for aiding DSM technology development and device characterization. Students will gain invaluable experience with the state-of-the-art technologies.