As conventional bulk-CMOS scaling is approaching the end of the roadmap, nonclassical CMOS alternatives are being explored for future generations of CMOS technology. The double-gate MOS transistor (DG-MOST) is one of the promising candidates. This project aims at investigating DG-MOST structures and characteristics through 2D numerical simulations, from which physical insights into the device physics (such as potential profiles, doping and layer thickness) can be obtained, which will be used to aid analytical model development. This project is in close relation with the joint Thematic Strategic Research Project (TSRP) on compact modeling of sub-45nm devices between IME and NTU.