Virtual Wafer Fabrication
K. Y. Lim and G. Y. Chong
(1996/97)
Abstract
Technology computer-aided design (TCAD) has been used extensively by
semiconductor companies to emulate wafer processing. This project
is directed towards the development and implementation of an integrated
design of experiment (DOE) environment that emulates a given semiconductor
process (such as the 0.25-µm CMOS process at CSM). The objective
is to develop such a system that can be used to predict results from process
without time-consuming and expensive wafer processing. Process parameters
are to be tuned/calibrated to the real process. Automated protocol
for predicting process windows for certain particular process steps will
be developed. The students will gain real-life experience in this
fast-growing industry.