CMOS RF design has gained increasing popularity and importance, which requires accurate capacitance models for deep-submicron (DSM) MOSFETs. In this project, intrinsic DSM MOSFET capacitance will be studied and simulated using 2D numerical simulators, from which geometry/bias-dependent capacitance will be extracted.  This work will provide basis and data for formulating compact intrinsic capacitance models, which will be extremely useful in RF circuit modelling and simulation.