| DOC TYPE | VIEW ISSUE TOC | VIEW FULL PAGE | VIEW CITATION |
| CNF |  |
 |
A
predictive semi-analytical threshold voltage model for deep-submicron MOSFET's
Lim, K.Y.; Zhou, X.; Lim, D.; Zu, Y.; Ho, H.M.; Loiko, K.; Lau, C.K.; Tse, M.S.; Choo, S.C. Electron Devices Meeting, 1998. Proceedings. 1998 IEEE Hong Kong , 1998 , Page(s): 114 -117 |
| CNF | |
|
An
experimentally-based DC model for the Bi-MOS structure and its adaptation
to a circuit simulation environment
Rofail, S.S.; Yeo, K.S.; Chew, K.W.; Zhou, X.; Tang, T.W. Electrical and Computer Engineering, 1998. IEEE Canadian Conference on Volume: 1 , 1998 , Page(s): 37 -40 vol.1 |
| CNF | |
|
A
dynamic
timing delay for accurate gate-level circuit simulation
Tang, T.; Zhou, X. Circuits and Systems, 1996., IEEE 39th Midwest symposium on Volume: 1 , 1996 , Page(s): 325 -327 vol.1 |
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