MIPS 101

Path: PC > IM > RF > ALU > MUX_{_MemtoReg} > MUX_{_JAL} > RF
Path: PC > IM > RF > MUX_{_ALUSrc} > ALU > MUX_{_MemtoReg} > MUX_{_JAL} > RF
Path: PC > IM > MUX_{_RegDst} > MUX_{_JAL} > RF
Path: PC > Adder > MUX_{_PCSrc} > MUX_{_Jump} > PC

Path: PC > IM > RF > ALU > MUX_{_MemtoReg} > MUX_{_JAL} > RF
Path: PC > IM > SX > MUX_{_ALUSrc} > ALU > MUX_{_MemtoReg} > MUX_{_JAL} > RF
Path: PC > IM > MUX_{_RegDst} > MUX_{_JAL} > RF
Path: PC > Adder > MUX_{_PCSrc} > MUX_{_Jump} > PC

Path: PC > IM > RF > ALU > DM > MUX_{_MemtoReg} > MUX_{_JAL} > RF
Path: PC > IM > SX > MUX_{_ALUSrc} > ALU > DM > MUX_{_MemtoReg} > MUX_{_JAL} > RF
Path: PC > IM > MUX_{_RegDst} > MUX_{_JAL} > RF
Path: PC > Adder > MUX_{_PCSrc} > MUX_{_Jump} > PC

Path: PC > IM > RF > ALU > DM
Path: PC > IM > SX > MUX_{_ALUSrc} > ALU > DM
Path: PC > IM > RF > DM
Path: PC > Adder > MUX_{_PCSrc} > MUX_{_Jump} > PC

Path: PC > IM > RF > ALU > AND > MUX_{_PCSrc}
Path: PC > IM > RF > MUX_{_ALUSrc} > ALU > AND > MUX_{_PCSrc}
Path: PC > IM > SX > SL2 > ALU > MUX_{_PCSrc} > MUX_{_Jump} > PC
Path: PC > Adder > ALU > MUX_{_PCSrc} > MUX_{_Jump} > PC
Path: PC > Adder > MUX_{_PCSrc} > MUX_{_Jump} > PC

Path: PC > IM > SL2 > Concatenator > Mux_{_Jump} > PC
Path: PC > Adder > Concatenator > Mux_{_Jump} > PC

Path: PC > IM > SL2 > Concatenator > Mux_{_Jump} > PC
Path: PC > Adder > Concatenator > Mux_{_Jump} > PC
Path: Mux_{_JAL} > RF
Path: Mux_{_JAL} > RF

The default view depicts the incremental design of a datapath that can run all instructions,
and within each button lies an individual view of the minimal datapath for that respective instruction.

With knowledge of the devices necessary for each instruction, if the delay of each device is provided,
calculation of the critical path is possible through simple addition.