CADTED

Accurate Timing Simulation of Mixed-Signal Circuits with a Dynamic Delay Model

Tianwen Tang and Xing Zhou

School of Electrical and Electronic Engineering, Nanyang Technological University
Nanyang Avenue, Singapore 639798, Republic of Singapore

(Click on the Figure inside the Paper to see its enlargement.)

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Figures

Fig. 2 | Fig. 4 | Fig. 5

Fig-2

Fig. 2 Voltage waveforms at node 1 of the circuit shown in Fig. 1 with different loads and different simulation modes.

Fig. 3 A string of HFET inverters driven by a sine wave.

Fig-4

Fig-5

Fig. 5 Voltage waveforms at the output of the NOR gate with different number of triggered inputs.