R-Format Datapath
The basic datapath ADD instruction SUB instruction AND instruction OR instruction SLT instruction JR instruction R-type instruction simulator
R & I-format Datapath
The advanced datapath ADDI instruction LW instruction SW instruction BEQ instruction I-type instruction simulator
Jump Instructions
J instruction JAL instruction
Tools
Multipath delay displayer Cache simulator by Aryani Instructions 101
R/I/J-type Simulator

Welcome to MIPS 101.

The content in this web application is designed around the content taught in the CE/CZ3001 module.

Content coverage

Content in this web application mainly revolve around the 32-bit MIPS Instruction Set Architecture. There are some tools to aid the user in visualizing cache memory as well as data forwarding.

The content provided here is considered as supplementary, and is in no way replacement for the lecture materials that the user should have gone through. Information on this site is provided as-is, if there is any form of ambiguity with respect to information, you are advised to consult your teaching assistants / lecturers.

Essential Information

Throughout the web applications, there will be times where you encounter a segment of information encapsulated as such:
XORI Instruction

In this example, the instruction demonstrated is ...

In such cases, it is imperative that the information is read before interacting with the web application as it contains important background information pertaining to the topic at hand.

Resolution

The elements in this website makes high usage of elements that are positioned absolutely, hence a monitor capable of displaying a width of at least 1280 pixels is recommended.

Browser

The website was developed and tested in Chrome v52.0.2743.82. While effort has been put in to make this web application compatible with other browsers such as Internet Explorer and Firefox, Chrome is the recommended browser to run this web application on.

Feedback

Suggestions? Feel free to email them to me.