Workshop on Compact Modeling (WCM) is one of the first of its kind in bringing people in the CM field together.  The objective of WCM is to create a truly open forum for discussion among experts in the field as well as feedback from technology developers, circuit designers, and CAD tool vendors.  The topics cover all important aspects of compact model development and deployment, within the main theme - compact models for circuit simulation, which are largely categorized into the following groups:

• Intrinsic Models

• Bulk MOSFET
• SOI MOSFET (partial-/full-depletion)
• Multiple-Gate FET (DG/TG/GAA)
• High-Voltage/LDMOS
• Thin-Film Transistor (TFT)
• Schottky-Barrier/Tunneling/Junctionless FET (SB-FET/JLFET/TFET)
• Bipolar/Junction (BJT/HBT/SiGe/JFET)
• HEMT (GaN/InGaP/InGaAs)
• Non-quasi-static
• RF

• Extrinsic/Interconnect Models

• Parasitic elements
• Passive device
• Diode
• Resistor
• ESD
• Interconnect

• Atomic/Quantum Models

• Ballistic device
• Carbon-Nanotube/Graphene FET (CNFET/GFET)
• Organic FET

• Statistical Variability/Reliability/Noise Models

• Statistical variability
• Reliability/hot carrier
• Mismatch
• Noise

• Multi-Level Models
• Subcircuit model
• Gate/block model
• Behavioral model
• Numerical/TCAD/table-based

• Model Extraction and Interface

• Parameter extraction and optimization
• Model-simulator interface
• Model standardization
• Model development platform
• Verilog-A

• Mansun Chan and Lining Zhang, Hong Kong University of Science and Technology, Hong Kong
• Luca Larcher, Applied Materials, USA
• Ning Lu, IBM, USA
• Paolo Pavan and Francesco Puglisi, Università di Modena e Reggio Emilia, Italy
• Ujwal Radhakrishna and Dimitri Antoniadis, Massachusetts Institute of Technology, USA
• Michael Shur, Rensselaer Polytechnic Institute, USA
• Lan Wei, University of Waterloo, Canada
• Zhaomin Zhu, Beibu Gulf University, China

Abstracts due: Jan. 24, 2020.
 

Full paper due: April 30, 2020.