Acad Unit: 2.0
Prerequisite: EE3013
Last update: 28 February 2007

Learning Objective

To reinforce and apply theories learned in semiconductor processing and device physics through practical design examples using industry-standard process and device simulation tools.
To better understand the modern technology development and transistor design and optimization through process variation.

Virtual Wafer Fabrication. Virtual Device Simulation. Virtual Process Integration.

This course provides practical training in CMOS fabrication, device and process integration using technology computer-aided designed (TCAD) simulation tools.

Through dedicated design exercises, students are expected to learn basic trade-off in process influence on device performance, and technology optimization through computer Design of Experiments. They will also learn practical skills in state-of-the-art technology computer-aided design (TCAD) simulation tools that are routinely used in all semiconductor wafer fabs and apply them for 2D process simulation and numerical device characterization, together with process integration and optimization.

Continuous Assessment: 50%

Final Examination: 50%

• Process Module: Virtual Wafer Fabrication (12 hours)

Introduction to physical simulation and TCAD. Process simulation and CMOS process flow. Basic semiconductor processing steps such as implantation, diffusion, oxidation. Design of experiment and wafer split.
Practice: virtual wafer fabrication of a 2-mm CMOS process.
 
• Device Module: Virtual Device Simulation (12 hours)

Device physical models. Numerical algorithms and solutions. Device simulation and electrical characterization. Device structural and electrical parameters. Visualization of device physical operation.
Practice: virtual device characterization of the fabricated 2-mm device.
 
• Integration Module: Virtual Process Integration (15 hours)

Device/process target-variable relations. Technology optimization through process variation. Device performance optimization and trade-offs.
Design Exercise: virtual process integration for MOS technology development and device optimization.

1. Tsividis Yannis, Operation and Modeling of the MOS Transistor, 3rd Edition, Oxford University Press McGraw-Hill (2005).
2. Arora Narain, MOSFET Models for VLSI Circuit Simulation – Theory and Practice, Springer-Verlag, 1993. Reprinted by World Scientific (2006).
3. Ben G. Streetman and Sanjay Kumar Banerjee, Solid State Electronic Devices, 6th edition, Chapter 6.4, Prentice Hall (2006).
4. Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge Univ. Press (2009).
5. Chenming Calvin Hu, Modern Semiconductor Devices for Integrated Circuits, Pearson (2010).
6. Simon M. Sze, Semiconductor Devices: Physics and Technology, 3rd Edition, Wiley, (2012).

• E425
• Introduction to Physical Simulation
• CMOS Design
• TSuprem4
• Medici
• TWB

• The Virtual Wafer Fab Technology for the Deep-Submicron ULSI Era
• Multi-Level TCAD Synthesis Approach to the Design and Optimization of Ultra-Small Transistors
• The Missing Link to Seamless Simulation

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