STUDENTS/STAFFS
Research Staffs | Graduated Students | Current
Student
Senior Research Staffs
Dr.
Pilsoon
Choi Senior Research Fellow Ph.D,
MS, BS from Dept. of Electrical Engineering, Korea Advanced Institute of
Science and Technology (KAIST) 2010 - 2011, Analog & Systems Leader, Samsung
Electronics Co. Ltd, Suwon, Korea. 2004 – 2009,Wireless Systems Leader, Samsung Electronics
Co. Ltd, Suwon, Korea. Currently Research Scientist, MIT.
Mao Mengda Research Associate MS, BS from Tongji University and Jilin University, China
respectively. 2006 - 2012, RF System and Architecture Design
Engineer, Huawei Technologies Co. Ltd, Shanghai, China
Dr.
Yi Xiang Research Associate/Fellow Ph.D,
M.Eng,
B.S from Nanyang Technological University, South China University of
Technology and Huazhong
University of Science and Technology respectively. Currently, Full Professor, South China University
(SCUT), previously, senior post-doctoral fellow, MIT, USA .
Dr.
Meng Fanyi Research Fellow Ph.D,
B.S from Nanyang Technological University, Singapore. Currently, Full Professor, Tianjin University;
previously, Associate Professor, UESTC, China.
Dr.
Guo Ting Research Fellow Ph.D
and M.Eng
from Southeast University, B.S from Jiangsu University of Science and
Technology, China Previously, Research Fellow
Dr.
Liu Bei Research Fellow Ph.D,
M.Eng,
B.S from Nanyang Technological University, Xidian
University, Northwestern
Polytechnical University, respectively. Currently, RFIC Engineer, China, previously,
Research Fellow, NTU, Singapore.
Dr.
Yang Kaituo Ph.D,
M.Eng,
B.S from Nanyang Technological University, University of Science and
Technology of China, and University of Science and Technology of China
respectively. Currently, Research Fellow, NTU, Singapore. |
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Ali Meaamar
(Iran) Previous: Arizona State University
(ASU), United States.-
Post-doc research associate (RF/Analog) |
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Miao Yannan (PRC) High-Frequency Low-Power Local
Oscillator Generation Full-time PhD Student Current work: Huawei Publications: 1. Y. N. Miao, C. C. Boon, M. A. Do,
K. S. Yeo and Y. X. Zhang, “High-Frequency Low-Power LC Divide-by-2/3
Injection-locked Frequency Divider,” Microwave and Optical Technology
Letters, v. 53, n 2, pp. 337-340, Feb. 2011. 2. Y. N. Miao, C. C. Boon, M. A. Do,
K. S. Yeo and Y. X. Zhang, “Low-power 2.4/5.15 GHz Dual-band
Voltage-Controlled Oscillator,” Microwave and Optical Technology Letters, v.
53, n 11, p 2495-7, Nov. 2011. 3. Y. N. Miao, C. C. Boon, M. A. Do,
K. S. Yeo and Y. X. Zhang, “A Low-Power 24-GHz Frequency Synthesizer for
Automotive Radar Application,” IEEE The 3rd
ICIME, May. 2011. 4. C. C. Boon, K. S. Yeo, M. A. Do
and Y. N. Miao, (Invited paper) “Low-Power LC-Tank-Reused Injection-Locked
Frequency Multiplier,” IEEE The 54th MWSCAS, p 4 pp, Aug. 2011. 5. Y. N. Miao, C. C. Boon, K. S. Yeo,
M. A. Do and Y. X. Zhang, “A Stacking Voltage-Controlled Oscillator and
Injection-Locked Frequency Divider for Low-Power and 12-GHz Operation,” IEEE
ICECC2011, Sept. 2011. 6. Y. X. Zhang, C. C. Boon, Y. N.
Miao, K. S. Yeo and M. A. Do, “Novel Hybrid Type Automatic Amplitude Control
Loop VCO,” IEEE ICECC2011, Sept. 2011.
Tran Thi Thu Nga (Vietnam) Publications: 1. T.T.N. Tran, C.C. Boon, M.A. Do and K.S. Yeo, “ Ultra-low power sub-mA series input resonance differential common
gate LNA”, IET electronic Letters, vol. 47, no. 12, pp.703-704, June 2011.
(Impact factor = 1.01) 2. T. T. N. Tran, C. C. Boon, M. A. Do and K. S. Yeo, "A
0.6V high reverse-isolation through feedback self-cancellation for
single-state non-cascode
CMOS LNA" , Microwave and Optical Technology Letters, vol. 54, no. 02, pp.
374–379, Feb. 2012. 3. T. T. N. Tran, C. C. Boon, M. A. Do and K. S. Yeo, " An
Input Matching Network without Gain Trade-off for Low-power CMOS LNA "
has been accepted for publication in Microwave Journal, 2012. 4. T.T.N. Tran, C.C. Boon, M.A. Do and K.S. Yeo, “A noise
reducing technique for common-gate LNA using shunt inductor” submitted to
IEEE Microwave and Wireless Components Letters. 5. T.T.N. Tran, C.C. Boon, M.A. Do and K.S. Yeo,
"Reciprocal Noise Canceling Low Power UWB LNA", IEEE International SoC Design
Conference (IEEE ISOCC), pp.13-16, Busan, Korea, Nov.2009. 6.
T.T.N. Tran, C.C. Boon, M.A. Do and K.S. Yeo, "A 2.4 GHz ultra
low-power high gain LNA utilizing
π-match and capacitive feedback input network”, IEEE Midwest Symposium
on Circuits and Systems (IEEE MWSCAS), Seoul, Korea, Aug. 7-10, 2011.
Yi Xiang Publications ·
X. Yi,
C. C. Boon, H. Liu, J. F. Lin, J. C. Ong, and W. M. Lim, “A 57.9-to-68.3GHz
24.6mW frequency synthesizer with in-phase injection-coupled QVCO in 65nm
CMOS,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2013, pp. 354–355. ·
X. Yi,
C. C. Boon, M. A. Do, K. S. Yeo, and W. M. Lim, “Design of ring-oscillator
based injection-locked frequency dividers with single-phase inputs,” IEEE
MWCL, vol. 21, no. 10, pp. 559–561, Oct. 2011. ·
X. Yi,
C. C. Boon, J. F. Lin, and W. M. Lim, “A 100 GHz transformer-based
varactor-less VCO with 11.2% tuning range in 65nm CMOS technology,” in Proc.
ESSCIRC, Sep. 2012, pp. 293–296. ·
X. Yi,
C. C. Boon, J. F. Lin, M. A. Do, K. S. Yeo, and W. M. Lim, “A divide-by-two injection-locked
frequency divider with 13-GHz locking range in 0.18-um CMOS technology,” in
IEEE Proc. of ISIC, Dec. 2011. ·
X. Yi,
C. C. Boon, H. Liu, J. F. Lin, and W. M. Lim, “A 57.9-to-68.3 GHz 24.6 mW frequency synthesizer with in-phase injection-coupled
QVCO in 65 nm CMOS Technology,” in IEEE J. Solid-State Circuits. (Under
review). ·
X. Yi,
C. C. Boon, J. Sun, N. Huang, and W. M. Lim, “A low phase noise 24/77 GHz
dual-band sub-sampling PLL for automotive radar applications in 65 nm CMOS
technology,” in Proc. ASSCC, 2013. (Under review). ·
H.
Liu, C. C. Boon, X. Yi, X. Zhu, M. Mao, P. Choi, and W. Yang, “Design of
ultra-low phase noise and high power integrated oscillator in 0.25um GaN-on-SiC HEMT technology,” IEEE MWCL (Under reviewed). ·
J.
Lin, C. C. Boon, X. Yi, and L. W. M., “A compact single stage V-band CMOS
power amplifier with 9.6dBm output power & 17.3% efficiency,” IEEE MWCL (Under reviewed) ·
N.
Huang, C. C. Boon, and X. Yi, “A dual-band 24 and 77 GHz CMOS LNA for
automotive radars,” in Int. Conf. on Electronics, Information and
Communication (ICEIC), Feb. 2013, pp. 44–45. ·
N.
Huang, C. C. Boon, and X. Yi, “Formulas for the analysis of effect of
feedback on noise performance,” in Int. Conf. on Electronics, Information and
Communication (ICEIC), Feb. 2013, pp. 1–3. ·
N.
Huang, X. Yi, and C. C. Boon, “Design of a fully integrated CMOS dual K- and
W- band lumped Wilkinson power divider,” in IEEE Int. Midwest Symp. Circuits
Syst., Aug. 2013. Patent ·
X. Yi, C. C. Boon, “In-Phase
Injection-Coupled Quadrature Voltage Controlled Oscillator”, STLO Ref:
12324S-LEES. Nov. 2012. US Provisional Application No.:61/756028.
Zhang YuXiang (PRC / RSS scholarship) Current work: Research Fellow, NTU. Publications ·
Y. X. Zhang and C. C. Boon, “An
In-Phase-Coupled Class-C Quadrature VCO with Tuneable Phase Error,” IEEE
Microwave and Wireless Components Letters. vol.24, pp. 796-798, Nov. 2014. ·
Y. X. Zhang, C. C. Boon, K. S. Yeo,
“Design And Analysis Of A 2.4 GHz Hybrid Type Automatic Amplitude Control VCO
With Forward Noise Reduction,” Journal of Circuits, Systems and Computers v.
23, no. 4, Apr. 2014. ·
Y. N. Miao, C. C. Boon, M. A. Do, K.
S. Yeo and Y. X. Zhang, “Low-power 2.4/5.15 GHz Dual-band Voltage-Controlled
Oscillator,” Microwave and Optical Technology Letters, v. 53, no. 11, p
2495-7, Nov. 2011 ·
Y. N. Miao, C. C. Boon, M. A. Do, K.
S. Yeo and Y. X. Zhang, “High-Frequency Low-Power LC Divide-by-2/3
Injection-locked Frequency Divider,” Microwave and Optical Technology
Letters, v. 53, no. 2, pp. 337-340, Feb. 2011. ·
Y. X. Zhang, C. C. Boon, Y. N. Miao,
K. S. Yeo and M. A. Do, “Novel Hybrid Type Automatic Amplitude Control Loop
VCO,” IEEE ICECC2011, Sept. 2011. ·
Y. N. Miao, C. C. Boon, M. A. Do, K.
S. Yeo and Y. X. Zhang, “A Low-Power 24-GHz Frequency Synthesizer for
Automotive Radar Application,” IEEE The 3rd ICIME, May. 2011. ·
Y. N. Miao, C. C. Boon, K. S. Yeo, M.
A. Do and Y. X. Zhang, “A Stacking Voltage-Controlled Oscillator and
Injection-Locked Frequency Divider for Low-Power and 12-GHz Operation,” IEEE
ICECC2011, Sept. 2011. Patent ·
Y. X. Zhang, C. C. Boon,
“In-Phase-Coupled Class-C Quadrature VCO with Tunable
Phase Error”. STLO Ref: 14373S-LEES, Nov. 2014.
Liu Hang Publications ·
H. Liu, X. Zhu, C. C. Boon and X. F. He,
"Cell-based variable-gain amplifiers with accurate dB-linear
characteristic in CMOS 0.18 µm technology," IEEE J. Solid-State
Circuits, vol. 50, no. 2, pp. 586-596, Feb, 2015. ·
H. Liu,
X. Zhu, and C. C. Boon, "A 71 dB 150 µW variable-gain amplifier in
0.18 µm CMOS technology," IEEE Microw.
Wireless Compon. Lett., available online. ·
H. Liu,
C. C. Boon and X. Zhu, "A
reconfigurable programmable-gain amplifier with gain step adjustment and
binary-weighted power consumption," Int.
Microw. Symp., Phoenix, AZ, May, 2015 ·
H. Liu,
X. F. He, X. Zhu and C. C. Boon, "A wideband analog-controlled
variable-gain amplifier with dB-linear characteristic for 60 GHz
application," IEEE TMTT, under review. ·
Liu, X.
Zhu, C. C. Boon, and X. Yi, "Design of an oscillator with low phase
noise and medium output power in a 0.25 µm GaN-on-SiC HEMT technology," IET Microwaves, Antennas
and Propagation, available online. ·
H. Liu, X. Zhu, C. C. Boon, X. Yi, M. D.
Mao and W. L. Yang, "Design of ultra-low phase noise and high power
integrated oscillator in 0.25µm GaN-on-SiC HEMT technology," IEEE Microw. Wireless Compon. Lett.,
vol.24, no.2, pp.120-122, Feb. 2014 ·
H. Liu, C. C. Boon, M. A. Do and K. S. Yeo,
"Design and analysis of a WLAN CMOS power amplifier using multiple gated
transistor techniques," Int. J. RF
Microw. Computer-Aided Engineering, vol. 21,
no. 2, pp. 157-163, Mar. 2011. ·
X. Yi, C. C. Boon, H. Liu,
J. F. Lin and W. M. Lim, "A 57.9-to-68.3 GHz 24.6 mW
frequency synthesizer with in-phase injection-coupled QVCO in 65 nm CMOS
technology," IEEE J. Solid-State Circuits, vol.49, no.2,
pp.347-359, Feb. 2014 ·
X. Yi, C. C. Boon, H. Liu, J. F. Lin, J. C. Ong
& W. M. Lim, "A 57.9-to-68.3GHz 24.6mW frequency synthesizer with
in-phase injection-coupled QVCO in 65nm CMOS technology", IEEE Int.
Solid-State Circuits Conf. Tech. Dig., pp. 250–251, 2013 ·
P. Choi, C. C. Boon, M. D. Mao and H. Liu, "28.8dBm, high
efficiency, linear GaN power amplifier
with in-phase power combining for IEEE 802.11p applications", IEEE
Microw. Wireless Compon.
Lett, vol. 23, no. 8, pp.433-435, Aug. 2013 Name: Huang Nan (G1101275D) PhD.
Topic: Millimeter-Wave CMOS Front-End Components Design Full-time
Student (Research Scholarship) 01/08/2011
to 21/07/2015 (Thesis submission date)
Publications during PhD: ·
N. Huang, C. C. Boon, and X. Yi, “A dual-band 24 and 77 GHz CMOS
LNA for automotive radars,” in International Conference on Electronics,
Information and Communication, 2013, pp. 44–45. ·
N. Huang, C. C. Boon, and X. Yi,
“Formulas for the analysis of effect of feedback on noise performance,” in International Conference on Electronics, Information
and Communication, 2013, pp. 54–55. ·
N. Huang, X. Yi, C. C. Boon, X. Zhao, J. Sun, G. Feng, “Design
of a fully integrated CMOS dual K- and W- band lumped Wilkinson power
divider,” in IEEE 56th International
Midwest Symposium on Circuits and Systems, 2013, pp. 788-791. ·
N. Huang, X. Yi, C. C.
Boon, X. He, G. Feng, W. M. Lim, X. Zhu, “A CMOS W-band 4x quasi-subharmonic
mixer,” IEEE Microwave and Wireless Components Letters, vol.23, no.10,
pp.548–550, 2015. ·
N. Huang, C. C. Boon, X.
Zhu, X. Yi, X. He, G. Feng, W. M. Lim, B. Liu., “A 65-nm CMOS LNA for
Bolometer Applications,” submitted to IEEE
transactions on nuclear science. ·
X. Yi, C. C. Boon, J. Sun, N. Huang, W. M. Lim, “ A Low Phase
Noise 24/77 GHz Dual-Band Sub-Sampling PLL for Automotive Radar Applications
in 65 nm CMOS Technology,” in IEEE
Asian Solid-State Circuits Conference, 2013, pp.417-420. ·
N. Huang*,. C.C. Boon, X. Zhu, X. Yi,
X. He, G.Y. Feng, W.M. Lim, B. Liu "A 65-nm CMOS LNA for Bolometer
Applications," Journal of Infrared, Millimeter,
and Terahertz Waves, Springer, accepted, Jan. 2016. (I.F=1.942)". Name: Sun Junyi (G1101644K) PhD. Topic: Novel
Techniques for CMOS RF and mm-wave Frequency Generator Full-time Student (EDB ICPS
Scholarship) 01/09/2011 to 14/08/2015 (Thesis
submission date) Current work: Broadcom, Singapore. Publications during PhD: ·
J. Y.
Sun, C. C. Boon, X. Yi, W. M. Lim, and M. F. Meng, "Design and analysis
of a K-band wideband VCO with robust start-up and frequency boost", IET
Microwave, Antennas& Propagation. (Accepted) ·
J. Y.
Sun, C. C. Boon, X. Yi, W. M. Lim, and M. F. Meng, "A V-band CMOS
divide-by-three ILFD with frequency-dependent injection enhancement",
IEEE Microw. Wireless Compon.
Lett. (Accepted). ·
J.
Sun*, C.C. Boon, X. Zhu, **X. Yi, "A Low-Power
Low-Phase-Noise VCO with Self-Adjusted Active Resistor," IEEE Microwave.
Wireless Component. Letter, vol. 26, no. 3, pp. 201-203, March 2016.
(I.F=1.784) ·
N.
Huang, X. Yi, C. C. Boon, X. J. Zhao, J. Y. Sun, G.Y. Feng, “Design
of a Fully Integrated CMOS Dual K- and W- band Lumped Wilkinson Power
Divider", IEEE, The 56th MWSCAS, Ohio, USA, Aug. 2013. Feng Guangyin CMOS Integrated Circuits for MM-Wave
Imaging Applications Fulltime PhD Student 09/01/2012 to 08/01/2016 (Thesis
submission date) Current work: Assistant Professor,
South China University of Technology.
Publications: ·
G.Y. Feng*, C.C. Boon, F. Meng, **X. Yi, "A 100-GHz 0.21-K NETD 0.9-mW/pixel
Charge-Accumulation Super-Regenerative Receiver in 65-nm CMOS," IEEE
Microwave. Wireless Component. Letter, vol. 26, no. 7, pp. 531-533, Jan.
2016. (I.F=1.784) 10.1109/LMWC.2016.2574833 ·
G.Y. Feng, C.C. Boon, F. Meng, **X. Yi, C. Y. Li, "Pole-Converging Intra-Stage Bandwidth
Extension Technique for Wideband Amplifiers," IEEE Journal of Solid
State Circuits, vol. 52, no. 3, pp. 769-780, Mar. 2017. (I.F=3.063) G. Y. Feng, C. C. Boon, F. Y. Meng, and X. Yi, “A 100-GHz 0.21-K
NETD 0.9-mW Charge-Accumulation Super-Regenerative Receiver in 65-nm CMOS,” IEEE Microw. Compon. Lett. (Under Review). ·
G. Y. Feng, X. Yi, F. Y.
Meng, C. C. Boon, Z. P. Liang, and C. Y. Li, “Direct-Detection Dicke Receiver
with a Switchable Dual-Path LNA for Millimeter-Wave
Imaging Systems,” IEEE Trans. Microw. Theory Techn. (To Be Submitted). ·
X. Yi, C. C. Boon, G. Y. Feng, and Z. P. Liang, “An
Eight-Phase In-Phase Injection-Coupled (IPIC) VCO for 77/79 GHz Automotive
Radar Applications in 65 nm CMOS Technology,” IEEE Microw. Compon.
Lett. (Under Review). ·
X. Yi, C. C. Boon, G. Y. Feng, Z. P. Liang, N. Huang,
and J. Y. Sun, "A 24/77 GHz Dual-Band Receiver with Ultra Low Phase
Noise Integrated Phase-Locked Loop for Automotive Radar Applications in 65 nm
CMOS Technology," IEEE Trans. Microw. Theory Techn. (To Be Submitted) ·
N. Huang, C. C. Boon, X. Zhu, X. Yi,
X. F. He, G. Y. Feng, W. M. Lim,
B. Liu., “A 65-nm CMOS LNA for Bolometer Applications,” Journal of Infrared, Millimeter, and
Terahertz Waves. (Accepted). ·
N. Huang, X. Yi, C. C. Boon, X. F.
He, G. Y. Feng, W. M. Lim, and X.
Zhu, “A CMOS W-Band 4x Quasi-Subharmonic Mixer,” IEEE Microw. Compon.
Lett., vol. 25, no. 6, pp. 385–387, Jun. 2015. ·
J. F. Lin, C. C. Boon, X. Yi, and G. Y. Feng, “A 50-59 GHz CMOS
Injection Locking Power Amplifier,” IEEE
Microw. Compon. Lett.,
vol. 25, no. 1, pp. 52–54, Jan. 2015. ·
G. Y. Feng, X. Yi, F. Meng,
C. C. Boon, Z. P. Liang, and C. Y. Li, “Direct-Detection Dicke Receiver with
a Switchable Dual-Path LNA for Millimeter-Wave
Imaging Systems,” IEEE RF Integr. Circuits Symp. (Under Review). ·
X. Yi, Z. P. Liang, G. Y. Feng, C. C. Boon, and F. Y.
Meng, “A 93.4-to-104.8GHz 57mW Fractional-N Cascaded Sub-sampling PLL with
True In-Phase Injection-Coupled QVCO in 65nm CMOS,” IEEE RF Integr. Circuits Symp. (Under
Review). ·
X. Yi, K. T. Yang, Z. P. Liang, B.
Liu, K. Devrishi, C. C. Boon, C. Y. Li, G.
Y. Feng, D. Regev, S. Shilo, F. Y. Meng, H. Liu, J. Y. Sun, G. G. Hu, and
Y. N. Miao, “A CMOS Transceiver for IEEE 802.11ax WLAN Applications in 65nm
CMOS,” IEEE RF Integr.
Circuits Symp. (Under Review). ·
N. Huang, X. Yi, C. C. Boon, J. Y.
Sun, and G. Y. Feng, “Design of a
Fully Integrated CMOS Dual K- and W- band Lumped Wilkinson Power Divider”, IEEE 56th International Midwest Symposium
on Circuits and Systems (MWSCAS), Ohio, USA, Aug. 2013. ·
G.Y. Feng, **X. Yi, F. Meng, C.C. Boon " A
W-Band Switch-Less Dicke Receiver for Millimeter-Wave
Imaging in 65 nm CMOS," IEEE Access, vol. 6, pp. 39233-39240, July
2018. (I.F=3.244) DOI: 10.1109/ACCESS.2018.2853552 (T1). Jiafu Lin CMOS
Mm-wave Transmitter Design Part-time PhD Student 09/01/2012 to 14/12/2015 (Thesis
submission date) Current Work: Academic
Staff; Previous work: Power Amplifier Designer, Shanghai.
Publications: ·
Jiafu Lin, C.C.
Boon, X. Yi and W. M. Lim, "A Compact Single Stage V-band CMOS
Injection-Locked Power Amplifier with 17.3% Efficiency," IEEE Microwave.
Wireless Component. Letter, vol24, no. 3 pp. 182-184, 2014 , no. 1, pp.
52-54, Jan. 2015. ·
Jiafu Lin, C.C. Boon, X.
Yi* and G. Y. Feng*, " A 50GHz - 59 GHz CMOS Injection Locking
Power Amplifier," IEEE Microwave. Wireless Component. Letter, vol. 25, no. 1, pp. 52-54, Jan. 2015. ·
X. Yi,
C.C. Boon, H. Liu, Jiafu
Lin and W. M. Lim, "A 57.9-to-68.3 GHz 24.6 mW
Frequency Synthesizer with In-Phase Injection-Coupled QVCO in 65 nm CMOS
Technology," IEEE Journal of Solid State Circuits, vol 49, no. 2, pp.
347-359, 2014. ·
Jiafu Lin, C.C.
Boon, B. Arya “Design of Load Dependent On-chip Power Combiner” under
submission. ·
Jiafu
Lin C.C. Boon, K. Dervrishi
“A Wideband Source-Driven CMOS Up-conversion Mixer for Mm-wave
Application” under submission. ·
Jiafu
Lin C.C. Boon, B. Arya “On-chip
Transformer-coupled CMOS PA Design Automatic Synthesis Algorithm” under submission ·
Jiafu
Lin C.C. Boon, K. Dervrishi
“A 11.48 dBm Output Power 13.6% Efficiency mm-wave Injection-locking
Transmitter” under submission ·
J.F. Lin, G. Zhang, C. C. Boon,
“A 40 GHz on-chip power combine load for mm-wave power amplifier”, Microwave.
and Optical Technology Letters, vol. xx, no. 1, pp. 37-39, March 2018. https://doi.org/10.1002/mop.31091 (I.F=0.731).
Liang
Zhipeng Current Work: Huawei Publications ·
Zhipeng Liang, Xiang Yi, Kaituo
Yang, Chirn Chye Boon, "A 2.6-3.4 GHz fractional-N sub-sampling phase-locked loop using a calibration-free
phase-switching-sub-sampling technique," IEEE Microwave and Wireless
Components Letters, vol. 28, no. 2, Feb. 2018. ·
Xiang Yi, Chirn Chye Boon, Guangyin
Feng and Zhipeng Liang, "An
eight-phase in-phase injection-coupled VCO in 65-nm CMOS technology," IEEE
Microwave and Wireless Components Letters, vol. 27, no. 3, pp. 299-301,
March 2017. ·
X. Quan, X. Yi, C. C. Boon, K. Yang,
C. Li, B. Liu, Z. Liang, Y.
Zhuang, "A 52–57 GHz 6-bit phase shifter with hybrid of passive and
active structures," IEEE Microwave
and Wireless Components Letters, vol. 28, no. 3, pp. 236-238, March 2018. ·
F. Meng, D. Disney, B. Liu, Y. B.
Volkan, A. Zhou, Z. Liang, L.
Selvaraj, L. Peng and C. C. Boon, “Heterogeneous integration of GaN and BCD technologies and its applications to high
conversion-ratio DC-DC boost converter IC,” IEEE Transactions on Power Electronics, accepted. ·
Xiang Yi, Zhipeng Liang, Guangyin Feng, Chirn Chye Boon and Fanyi Meng,
"A 93.4-to-104.8 GHz 57 mW fractional-N
cascaded sub-sampling PLL with true in-phase injection-coupled QVCO in 65 nm
CMOS," 2016 IEEE Radio Frequency Integrated Circuits Symposium
(RFIC), San Francisco, CA, 2016, pp. 122-125. ·
Xiang Yi, Zhipeng Liang, Chirn Chye Boon, “A 20.2-57.1 GHz inductor-less
divide-by-4 divider chain,” presented at the Progress in Electromagnetic
Research Symposium (PIERS), Singapore, 2017, pp. 1312-1318. ·
Xiang Yi, Kaituo Yang, Zhipeng Liang, et al.,
"A 65nm CMOS carrier-aggregation transceiver for IEEE 802.11 WLAN
applications," 2016 IEEE Radio Frequency Integrated Circuits
Symposium (RFIC), San Francisco, CA, 2016, pp. 67-70. ·
Z.P. Liang, **X. Yi, C.C. Boon,
**G.Y. Feng, F.Y. Meng, **K.T. Yang, “An Inverted Ring Oscillator
Noise-Shaping Time-to-Digital Converter with In-band Noise Reduction and
Oscillator Phase Noise Cancellation”, IEEE
Transaction on Circuits and Systems- I, vol. 67, no. 2, pp. 686-698,
Feb. 2020. DOI: 10.1109/TCSI.2019.2949732
(I.F=2.24) Patent Z. Liang, C. C. Boon, X. Yi and J. S. Kee, “Time-to-digital converter,” U.S. Patent, filed
May 25, 2018. NTU ref: 2018-009-04-US
Arya Balachandran Publications ·
Arya Balachandran and
Yong Chen and Pilsoon Choi and Chirn Chye Boon,
“0.058 mm2 13 Gbit/s inductorless analogue
equaliser with low frequency equalisation compensating 15 dB channel loss” in
IET Electronics Letters, vol. 54,
no. 2, pp. 72-74, Jan. 2018 ·
Arya Balachandran and
Yong Chen and Chirn Chye Boon, “0.013-mm2 0.53-mW/Gb/s 32-Gb/s Hybrid Analog
Equalizer Under 21-dB Channel Loss in 65-nm CMOS” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
vol. 26, no. 3, pp. 599-603, Mar. 2018 ·
A. Balachandran and
L.-S. Peh and C. C. Boon, “An energy efficient 1 Gb/s on-chip opto-electronic
transceiver link using monolithically integrated CMOS and III-V LEDs”
presented at 2017 Opto-Electronics and
Communications Conference (OECC) and Photonics Global Conference (PGC),
Singapore, Jul. 2017 ·
T. Krishna and A. Balachandran and S. B. Chiah and L. Zhang and B. Wang and C.
Wang and K. L. E. Kian and J. Michel and L.-S. Peh, “Automatic
place-and-route of emerging LED-driven wires within a
monolithically-integrated CMOS and III-V process” presented at Design, Automation Test in Europe
Conference Exhibition (DATE), Switzerland Mar. 2017. Best paper award in the Design and Test track.
Kong Lingshan Publications ·
L. Kong, Y. Chen, C. C. Boon, P.-I. Mak. And
R. P. Martins, “A wideband inductorless dB-linear
automatic-gain control amplifier using a single-branch negative exponential
generator for wireline applications,” IEEE Transactions on Circuits and
Systems I: Regular Papers, vol. 65, no. 10, pp. 3196-3206, Oct. 2018. ·
H. Liu, X. He, X. Zhu, C. C. Boon, X.
Yi and L. Kong, “A wideband analog-controlled variable-gain amplifier with dB-linear
characteristic for high-frequency applications,” IEEE Trans. Microw. Theory Tech., vol. 64, no. 2, pp.533–540, Feb.
2016. ·
H. Liu, X. Zhu, C. C. Boon, X. Yi and
L. Kong, “A 71 dB 150 μW variable-gain amplifier in 0.18 μm CMOS technology,” IEEE Microw.
Wireless Compon. Lett., vol. 25, no. 5, pp.
334–336, May 2015. ·
L.S. Kong, **H. Liu, **X. Zhu, C.C. Boon, **C. Y. Li, **Z. Liu, K.
S. Yeo, “Design of a Wideband Variable-Gain Amplifier with Self-Compensated
Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology”, IEEE Transaction on Circuits and Systems-
I, vol. x, no. 10, pp. x-3206, May. 2020. DOI:
10.1109/TCSI.2020.2995725 (I.F=2.24)
(Delta)
Yu Haohong Publications ·
H. Yu, Y. Chen, C. C. Boon, P.-I. Mak, and R. P.
Martins, “A 0.096-mm2 1-to-20-GHz Triple-Path
Noise-Cancelling Common-Gate Common-Source LNA with Complementary pMOS-nMOS Configuration,” IEEE Transactions on Microwave Theory and Techniques,
vol. xx, pp. xxxx-xxxx, 2019. (Accepted) ·
L. Kong, Y. Chen, H. Yu, Q. Pan, C. C.
Boon, P.-I. Mak, and R. P. Martins, “A Wideband Inductorless
Variable Gain Amplifier Using a Single-Branch Negative Exponential Generator
for Wireline Applications,” IEEE Asia Pacific Conference on Circuits
and Systems (APCCAS), pp. xx-xx, Nov. 2019. (Accepted) ·
H. Yu, Y. Chen, C. C. Boon, C. Li, P.-I. Mak, and R.
P. Martins, "A 0.44-mm2 0.5-to-7-GHz
Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat
NF of 3.3±0.45 dB,” IEEE Transactions on Circuits and Systems - II,
vol. 66, no. 10, pp. 71-75, Jan. 2019. ·
Y. Chen, P.-I. Mak, H. Yu, C. C. Boon, and R.
P. Martins, “An Area-Efficient and Tunable Bandwidth-Extension Technique for
a Wideband CMOS Amplifier Handling 50+ Gb/s Signaling,” IEEE
Transactions on Microwave Theory and Techniques, vol. 65, no. 12, pp.
4960-4975, Dec. 2017. ·
H. Yu, Y. Chen., C.C. Boon, P-I Mak, and R. P. Martin, , “A 0.096-mm2
1-to-20-GHz Triple-Path Noise-Cancelling Common-Gate Common-Source LNA with
Complementary pMOS-nMOS Configuration”, " IEEE
Transactions on Microwave Theory and Techniques, vol. xx, no. x pp. x-x,
Aug.. 2019. (I.F=3.176) DOI: 10.1109/TMTT.2019.29497962939311 (LEES) ·
H. Yu, Y. Chen., C.C. Boon, **C.Y. Li, P-I Mak, and R. P. Martin, , “A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-
Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45
dB”, IEEE Transaction on Circuits
and Systems-II, vol. 66, no. 1, pp. 71-75, Jan. 2019. (I.F=1.660) DOI:10.1109/TCSII.2018.2833553 (T1)
Liu Bei Publications ·
B. Liu, X. Yi, K. Yang, Z. Liang, G. Feng, P. Choi, C. C. Boon, and C.
Li, “A carrier aggregation transmitter front end for 5-GHz WLAN 802.11ax
application in 40-nm CMOS,” IEEE Transactions on Microwave Theory and
Techniques, vol. 68, no. 1, pp. 263-275, Jan. 2020. ·
B. Liu, X. Quan, C. C. Boon, D. Khanna, P. Choi, and X. Yi,
“Reconfigurable 2.4/5-GHz dual-band transmitter front-end supporting 1024-QAM
for WLAN 802.11ax application in 40-nm CMOS,” IEEE Transactions on
Microwave Theory and Techniques, 2020. ·
B. Liu, M. Mao, D. Khanna, C. C. Boon, P. Choi, and E. A. Fitzgerald,
“A novel 2.6-6.4GHz highly integrated broadband GaN
power amplifier,” IEEE Microwave and Wireless Components Letters,
vol. 28, no. 1, pp. 37-39, Jan. 2018. ·
B. Liu, M. Mao, C. C. Boon, P. Choi, D. Khanna, and E. A. Fitzgerald,
“A fully integrated Class-J GaN MMIC power
amplifier for 5-GHz WLAN 802.11ax application,” IEEE Microwave and
Wireless Components Letters, vol. 28, no. 5, pp. 434-436, May 2018. ·
B. Liu, M. Mao, D. Khanna, P. Choi, C. C. Boon, and E. A. Fitzgerald,
“A highly efficient fully integrated GaN power
amplifier for 5-GHz WLAN 802.11ac application,” IEEE Microwave and
Wireless Components Letters, vol. 28, no. 5, pp. 437-439, May 2018. ·
X. Yi, K. Yang, Z. Liang, B. Liu,
K. Devrishi, C. C. Boon, C. Li, G. Feng, D. Regev, S. Shilo, F. Meng, H. Liu,
J. Sun, G. Hu, and Y. Miao, “A 65nm CMOS carrier-aggregation transceiver for
IEEE 802.11 WLAN applications,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), pp. 67-70,
2016. ·
F. Meng, D. Disney, B. Liu, Y.
B. Volkan, A. Zhou, Z. Liang, X. Yi, S. L. Selvaraj, L. Peng, K. Ma, and C.
C. Boon, “Heterogeneous integration of GaN and BCD
technologies and its applications to high conversion-ratio DC-DC boost
converter IC,” IEEE Transactions on Power Electronics, vol. 34,
no. 3, pp. 1993-1996, Mar. 2019. ·
D. Khanna, C. C. Boon, P. Choi, L.
Siek, B. Liu, and C. Li, “A low-noise, positive-input, negative-output
voltage generator for low-to-moderate driving capacity applications,” IEEE
Transactions on Circuits and System-I: Regular Papers, vol. 66, no.
9, pp. 3423-3436, Sep. 2019. ·
X. Yi, Z. Liang, G. Feng, F. Meng, C.
Wang, C. Li, K. Yang, B. Liu, and C. C. Boon, “A 93.4-104.8-GHz 57-mW
fractional-N cascaded PLL with true in-phase injection-coupled QVCO in 65-nm
CMOS tehnology,” IEEE Transactions on Microwave Theory and Techniques,
vol. 67, no. 6, pp. 2370-2381, Jun. 2019. ·
X. Yi, G. Feng, Z. Liang,
C. Wang, B. Liu, C. Li, K. Yang, C.C. Boon, and Q. Xue, “A 24/77
GHz dual-band receiver for automotive radar applications,” IEEE Access,
vol. 7, pp. 48053-48059, Mar. 2019. ·
X. Quan, X. Yi, C. C. Boon, K. Yang,
C. Li, B. Liu, Z. Liang, and Y. Zhuang, “A 52-57 GHz 6bits phase
shifter with hybrid pf passive and active structures,” IEEE Microwave
and Wireless Components Letters, vol. 28, no. 3, pp. 236-238, Mar.
2018.
Chenyang Li CMOS Power Detector and Power
Amplifier Design for WLAN 802.11ax Part-time PhD Student 08/2014 to 02/2020 (Thesis submission
date) Current work : Electrical Senior Engineer, Skyworks, Singapore [1] Chenyang Li, Chirn Chye Boon, Xiang Yi,
Zhipeng Liang, Kaituo Yang. ”Compact Switched-Capacitor Power Detector with
Frequency Compensation in 65-nm CMOS.” IEEE Access, vol. 8, pp. 34197– 34203, 2020. [2] Chenyang Li, Xiang Yi, Chirn Chye Boon,
Kaituo Yang. ”A 34-dB Dynamic Range 0.7-mW Compact Switched-Capacitor Power
Detector in 65-nm CMOS.” IEEE Trans. Power Electron. vol. 34, no. 10, pp. 9365-9368, 2019. [3] Chenyang Li, Chirn Chye Boon, Yongkui Yang, Enyi Yao, and Minoru Fujishima. ”MOSFET
Small-Signal Model Considering Hot-Carrier Effect for Millimeter-Wave
Frequencies.” J. Infrared, Millimeter, Terahertz Waves, vol.40, no. 4, pp. 419-428,
2019.
Dr.
Yang Kaituo Ph.D,
M.Eng,
B.S from Nanyang Technological University, University of Science and
Technology of China, and University of Science and Technology of China
respectively. Currently, Research Fellow, NTU, Singapore. Publications 1.
Kaituo
Yang, et al., “A Parallel
Sliding-IF Receiver Front-End With Sub-2-dB Noise Figure for 5-6 GHz WLAN
Carrier Aggregation,” IEEE J. Solid-State Circuits, vol. 56, no.2, pp.
392-403, Feb. 2021. 2.
Kaituo
Yang, C. C. Boon, G.Y. Feng,
C.Y. Li, Z. Liu, X. Yi, Y.T. Dong, A. Zhou, X.Y. Wang, “A 1.75dB NF 25mW 5GHz
Transformer-Based Noise Cancelling CMOS Receiver Front-End", IEEE
International Solid-State Circuits Conference (ISSCC), San Francisco, USA,
pp. 102-104, Feb. 2021. 3.
Kaituo
Yang, C. C. Boon, *Z. Liu,
*J.M. Piao, T. Guo, Y.T. Dong, C.Y. Li, *A. Zhou, *Z.J. Yang, X.Y. Wang, Y.F.
Liu, “A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver With
+10dBm In-Band IIP3 in Current-Mode and 1.7dB NF in Voltage-Mode",
International Solid-State Circuits Conference (ISSCC), San Francisco, USA,
accepted, Feb. 2022.
Siliconization of
Millimeter-Wave to Terahertz Surface-Plasmonic Transceiver and Phase-locked
Loops Full-time PhD Student 01/2017 to 10/2021
(Thesis submission date) Current work: Assoc.
Professor, Guangzhou University, China. 1.
Y. Liang
et al, "An Energy-efficient Sub-THz I/O by Surface Plasmonic
Polariton Interconnect in CMOS," IEEE Trans. Microw.
Theory Techn. (TMTT), Vol. 65, No. 8, pp. 2762–2774, Mar. 2017. 2.
Y. Liang
et al, "A 13.5 Gb/s 140-GHz Silicon Redriver
Exploiting Metadevices for Short-Range OOK
Communications," IEEE Trans. Microw. Theory
Techn. (TMTT), Vol. 70, No. 1, pp. 239–253, Jan. 2022. 3.
Y. Liang
and C. C. Boon, "A 40 GHz CMOS PLL With −75-dBc
Reference Spur and 121.9-fsrms Jitter Featuring a Quadrature
Sampling Phase-Frequency Detector," IEEE Trans. Microw.
Theory Techn. (TMTT), accepted, early access, DOI: 10.1109/TMTT.2022.3148427.
4.
Y. Liang
et al., “A low-jitter and low-reference-spur 320 GHz signal source
with an 80 GHz integer-N phase-locked loop using a quadrature XOR technique,”
IEEE Trans. Microw. Theory Techn. (TMTT),
accepted, early access, Mar. 22, 2022, doi:
10.1109/TMTT.2022.3156901. 5.
Y. Liang,
C. C. Boon, and Q. Chen, "A 23.4 mW –72-dBc
Reference Spur 40 GHz CMOS PLL Featuring a Spur-Compensation Phase
Detector," IEEE Microw. Wireless Compon. Lett. (MWCL), accepted, early access, DOI:
10.1109/LMWC.2022.3153326. 6.
Y. Liang
et al, "Design and Analysis of D-band on-chip Modulator and
Signal Source based on Split-Ring Resonator," IEEE Trans. Very Large
Scale Integr. (VLSI) Syst., vol. 27, no. 7, pp.
1513 – 1526, Apr. 2019. 7.
Y. Liang,
C. C. Boon and H. Yu, "A Crosstalk-immune Sub-THz All-surface-wave I/O
Transceiver in 65-nm CMOS," in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), June 2018, pp. 352 –
355. 8.
Y. Liang
et al. "D-band Surface-wave Modulator and Signal Source
with 40 dB Extinction Ratio and 3.7 mW Output Power
in 65 nm CMOS," in IEEE European Solid State Circuits Conference
(ESSCIRC), Sep. 2018, pp. 142–145. 9.
Y. Liang et
al. "A 311.6 GHz Phase-locked Loop in 0.13 μm SiGe BiCMOS Process with –90 dBc/Hz
in-band Phase Noise," IEEE International Microwave Symposium (IMS),
Aug. 2020, pp. 1133 – 1136. 10.
Y Liang,
CC Boon, Q Chen, Y Dong, “Millimetre-wave and Terahertz Antennas and
Directional Coupler Enabled by Wafer-Level Packaging Platform with
Interposer”, 2021 IEEE International Symposium on Circuits and Systems
(ISCAS), 27 Apr. 2021, pp. 1-5.
Gibran Limi Jaya A CMOS Equivalent-Time Sampling Digitizer for
a Direct-Millimeter-Wave UWB Pulse Doppler Radar
Receiver Implementation Ph.D. Student 01/2015 to 06/2021 (Thesis submission) Current Work: Senior Engineer, Mixed-Signal
Design Eng, Analog Devices (Legacy-LTC), Singapore [1] G. L. Jaya, C. C. Boon, S. Chen,
and L. Siek, "An equivalent-time sampling millimeter-wave
ultra-wideband radar pulse digitizer in CMOS,” IEEE Trans. Circuits Syst.
I: Regular Papers, in peer review. [2] G. L. Jaya, S. Chen, and L. Siek,
"The design of clocked-comparator-based time-interval measurement
circuit for pulse ToF measurement," IEEE
Sensors J., vol. 17, no. 20, pp. 6699 - 6706, Oct. 2017. [3] G. L. Jaya and S. Chen, "A 40
nm CMOS T/H-less flash-like stroboscopic ADC with 23dB THD and >50 GHz
effective resolution bandwidth," in IEEE Int. Symp. Circuits Syst.,
Baltimore, MD, USA, May 28-31 2017, pp. 1 – 4. [4] G. L. Jaya, S. Chen, and L. Siek,
“A dual redundancy radiation-hardened Flip-Flop based C-element in 65 nm
process,” in IEEE Int. Symp. Integr. Circuits,
Singapore, SG, Dec. 12-14 2016, pp. 1 – 4. [5] G. L. Jaya and S. Chen,
“Frequency-response-associated delay-dispersion issue in time-delay measuring
sensors,” in IEEE Sensors, Orlando, FL, USA, Oct. 30-Nov. 3 2016,
pp. 1 – 3. [6] G. L. Jaya, S. Chen, and L. Siek,
“A high-resolution on-chip propagation delay measurement scheme,” in Int.
SoC Des. Conf., Gyungju, KR, Nov. 2-5 2015, pp.
143 – 144. [7] G. L. Jaya, S. Chen, and L. Siek,
“A wideband memory-efficient analog to digital
converter for periodic signals digitization,” NTUitive,
Nanyang Tech. Univ., Singapore, SG, Technol. Discl.
Ref.: TD/077/15, 2015
Zhe Liu Design of wideband noise-cancelling
low-noise amplifiers. PhD time: 27-JUL-2018 to 31-DEC-2022.
Current work: Research Associate,
NTU, Singapore. Publications [1]
Z.
Liu and C. C. Boon,
"A 0.092-mm2 2–12-GHz Noise-Cancelling Low-Noise Amplifier
With Gain Improvement and Noise Reduction," IEEE Transactions on Circuits
and Systems II: Express Briefs, vol. 69, no. 10, pp. 4013-4017, Oct.
2022. [2]
Z.
Liu, C. C. Boon, C.
Li, K. Yang, Y. Dong, T. Guo, “A 0.0078mm2 3.4mW Wideband
Positive-Feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting Gm
Boosting”, in 2022 IEEE International Solid- State Circuits Conference
(ISSCC), Feb. 2022. [3]
Z.
Liu, C. C. Boon, X.
Yu, C. Li, K. Yang, Y. Liang, “A 0.061-mm2 1–11-GHz Noise-Canceling Low-Noise Amplifier Employing Active
Feedforward With Simultaneous Current and Noise Reduction”, IEEE Trans. Microw. Theory Techn., vol. 69, no. 6, pp. 3093–3106,
Jun. 2021. [4]
Z.
Liu, L. Lou, Z. Fang,
K. Tang, T. Guo and Y. Zheng, “A DLL-based configurable multi-phase clock
generator for true-time-delay wideband FMCW phased-array in 40nm CMOS,” in Proc.
IEEE Int. Symp. Circ. Syst. (ISCAS), May 2018, pp. 1–4. [5]
K.
Yang, C. C. Boon, Z. Liu, J. Piao, T. Guo, Y. Dong, C. Li, A. Zhou, Z.
Yang, X. Wang, Y. Liu, “A Hybrid Coupler-First 5GHz Noise-Cancelling
Dual-Mode Receiver with +10dBm In-Band IIP3 in Current-Mode and 1.7dB NF in
Voltage-Mode”, in 2022 IEEE International Solid- State Circuits Conference
(ISSCC), Feb. 2022. [6]
K.
Yang, C. C. Boon, G. Feng, C. Li, Z. Liu, T. Guo, X. Yi, Y. Dong, A.
Zhou, X. Wang, “A 1.75dB-NF 25mW 5GHz Transformer-Based Noise-Cancelling CMOS
Receiver Front-End”, in IEEE ISSCC, Feb. 2021, pp. 102–104. [7]
L.
Lou, K. Tang, B. Chen, T. Guo, Y. Wang, W. Wang, Z. Fang, Z. Liu, Y.
Zheng, “A 253mW/Channel 4TX/4RX pulsed chirping phased-array radar TRX in
65nm CMOS for x-band synthetic aperture radar imaging,” in Proc. IEEE
ISSCC, San Francisco, CA, USA, 2018, pp. 160–162. [8]
Y.
Dong, C. C. Boon, K. Yang and Z. Liu, "A 2-GHz Dual-Path
Sub-Sampling PLL with Ring VCO Phase Noise Suppression," in 2022 IEEE
Custom Integrated Circuits Conference (CICC), Apr. 2022. [9]
Y.
Dong, C. C. Boon, X. Ding, C. Li, and Z. Liu, ‘‘A bidirectional
nonlinearly coupled QVCO with passive phase interpolation for multiphase
signals generation,’’ IEEE Trans. Very Large Scale Integr.
(VLSI) Syst., vol. 29, no. 7, pp. 1480–1484, Jul. 2021. [10]
Y.
Dong, L. Kong, C. C. Boon, K. Yang, Z. Liu, C. Li, A. Zhou, “A
wideband dB-linear variable-gain amplifier with a compensated negative
pseudo-exponential generation technique,” IEEE Trans. Microw.
Theory Techn., vol. 69, no. 6, pp. 2809–2821, Jun. 2021. [11]
Y.
Liang, C. C. Boon, Y. Dong, Q. Chen, Z. Liu, C. Li, T. Mausolf, D.
Kissinger, Y. Wang, H. J. Ng, “A 311.6 GHz Phase-locked Loop in 0.13 μm SiGe BiCMOS Process with –90 dBc/Hz
in-band Phase Noise,” in Proc. IEEE MTT-S Int. Microw.
Symp. (IMS), Aug. 2020. pp. 1133-1136. [12]
Y.
Dong, L. Kong, C. C. Boon, Z. Liu, C. Li, K. Yang, A. Zhou, “A
wideband variable-gain amplifier with a negative exponential generation in
40-nm CMOS technology,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Aug. 2020, pp.
375–378. [13]
Q.
Chen, C. C. Boon, X. Zhang, C. Li, Y. Liang, Z. Liu, T. Guo,
“Multi-channel FSK Inter/Intra-chip Communication by Exploiting
Field-confined Slow-wave Transmission Line,” in Proc. IEEE Int. Symp.
Circ. Syst. (ISCAS), Oct. 2020, pp. 1–5. [14]
L.
Kong, H. Liu, X. Zhu, C. C. Boon, C. Li, Z. Liu, K. S. Yeo, “Design of
a wideband variable-gain amplifier with self-compensated transistor for accurate
dB-linear characteristic in 65 nm CMOS technology,” IEEE Trans. Circuits
Syst. I, Reg. Papers, vol. 67, no. 12, pp. 4187–4198, Dec. 2020. [15]
L.
Lou, K. Tang, Z. Fang, B. Chen, T. Guo, Z. Liu, Y. Zheng, “A DDS-driven
ADPLL chirp synthesizer with ramp-interpolating linearization for FMCW radar
application in 65 nm CMOS,” in Proc. IEEE Int. Symp. Circuits Syst.
(ISCAS), Florence, Italy, May 2018, pp. 1–4.
Dong Yangtao Design of Variable Gain Amplifiers for Wireless
or Wireline Communication PhD Student 27/07/2018
to 09/08/2022 (Thesis Submission Date) Current
Work: Research Associate, VIRTUS, Nanyang Technological University, Singapore Publications ·
Yangtao Dong, Chirn Chye Boon, Kaituo Yang, Zhe Liu, "A 2-GHz Dual-Path
Sub-Sampling PLL with Ring VCO Phase Noise Suppression," IEEE Custom
Integrated Circuits Conference (CICC), April 2022, pp. 1-2. ·
Yangtao Dong, Chirn Chye Boon, Xin Ding, Chenyang Li and Zhe Liu, "A
Bidirectional Nonlinearly Coupled QVCO With Passive Phase Interpolation for
Multiphase Signals Generation," IEEE Transactions on Very Large Scale
Integration (VLSI) Systems, vol. 29, no. 7, pp. 1480-1484, Jul. 2021. ·
Yangtao Dong, Chirn Chye Boon, Kaituo Yang, Ao Zhou and Xin Ding, "A
Cross-Coupled Pair Regeneration Based dB-Linear Programable Gain Amplifier
with THD Enhancement," IEEE International Symposium on Circuits
and Systems (ISCAS), May 2021, pp. 1-5. ·
Yangtao Dong, Lingshan Kong, Chirn Chye Boon, Kaituo Yang, Zhe Liu, Chengyang Li, Ao Zhou, "A Wideband dB-Linear
Variable-Gain Amplifier With a Compensated Negative Pseudo-Exponential
Generation Technique," IEEE Transactions on Microwave Theory and
Techniques, vol. 69, no. 6, pp. 2809-2821, Jun. 2021. ·
Yangtao Dong, Lingshan Kong, Chirn Chye Boon, Zhe Liu, Chengyang
Li, Kaituo Yang, Ao Zhou, "A Wideband Variable-Gain Amplifier with a
Negative Exponential Generation in 40-nm CMOS Technology," IEEE
Radio Frequency Integrated Circuits Symposium (RFIC), Aug. 2020, pp.
375-378. ·
Yangtao Dong, Chirn Chye Boon, Zhe Liu, Zhijie Yang, "In-Phase
Injection-Coupled Quadrature Voltage-Controlled Exploiting Negative
Resistance Based Coupling Cell," Singapore Provisional Patent,
filed 01 Dec, 2021. ·
Yangtao Dong, Chirn Chye Boon, Kaituo Yang, "Dual-Path Sub-Sampling PLL
With Feedback Phase Noise Cancellation Technique," Singapore
Provisional Patent, filed 07 Sep, 2021.
Chen
Qian High-Speed
CMOS Time-Domain ADC Design Ph.D.
Student 31/07/2017 to 30/09/2022
(Thesis Submission Date) Current Work: Staff
Engineer, Kun Gao Xinxin
Technologies, Pte., Ltd., Singapore. Publications
(first-author) ·
Q.
Chen, Y. Liang, C. C. Boon, Q. Liu, “A Single-Channel 10GS/s 8b>36.4d8
SNDR Time-Domain ADC Featuring Loop-Unrolled Asynchronous Successive
Approximation in 28nm CMOS,” IEEE International Solid-State Circuits
Conference (ISSCC), Feb. 2023. ·
Q.
Chen, C. C. Boon, Q. Liu, Y. Liang, “A Single-Channel Voltage-Scalable 8-GS/s
8-b > 37.5-dB SNDR Time-Domain ADC with Asynchronous Pipeline Successive
Approximation in 28-nm CMOS,” IEEE Journal of Solid-State Circuits (JSSC
Early Access), 2022. ·
Q.
Chen, C. C. Boon, Y. Liang, “A 0.6 V 4 GS/s −56.4 dB THD
Voltage-to-Time Converter in 28 nm CMOS,” IEEE ACCESS, vol. 10, pp.
88558-88566, 2022 ·
Q.
Chen, Y. Liang, C. C. Boon, “A 6bit 1.2GS/s Symmetric Successive
Approximation Energy-Efficient Time-to-Digital Converter in 40nm CMOS,” IEEE
International Symposium on Circuits and Systems (ISCAS), Oct. 2020. ·
Q.
Chen, Y. Liang, C. C. Boon, B. Kim, “A 3GS/s Highly Linear Energy Efficient
Constant-Slope Based Voltage-to-Time Converter,” IEEE International Symposium
on Circuits and Systems (ISCAS), Oct. 2020. ·
Q.
Chen et al., “Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting
Field-Confined Slow-Wave Transmission Line,” IEEE International Symposium on
Circuits and Systems (ISCAS), Oct. 2020. ·
Q.
Chen et al., “A 16×128 Stochastic-Binary Processing Element Array for
Accelerating Stochastic Dot-Product Computation Using 1-16 Bit-Stream
Length,” IEEE Design, Automation & Test in Europe Conference &
Exhibition (DATE), Mar. 2020. Visiting Staffs/PhD Exchange/Intern
Student Quan Xing (PhD CSC) Publications During Internship ·
X. Quan, X. Yi, C. C. Boon, K. T.
Yang, C. Y. Li, B. Liu, Z. P. Liang, Y. Q. Zhuang, "A 52-57 GHz 6-bit
phase shifter with hybrid of passive and active structures," IEEE
Microwave. Wireless Component. Letter, vol. 28, no. 3, pp. 236-238, Feb.
2018. (I.F=1.784) 10.1109/LMWC.2018.2802706 Ding
Xin (PhD CSC) 2019-2020 Publications During Internship ·
**A. Zhou, X. Ding, C.C. Boon, L. Siek, L. Yuan,
Y.T. Dong, “A Low-Power Quadrature LO Generator with Mutual Power-Supply
Rejection Technique”, IEEE Access, Vol. 9, pp. 137241-137248, Oct. 2021.
(I.F=2.037)DOI: 10.1109/ACCESS.2021.3116160 (T2) ## |
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1 Yang Zhijie 2020 - present Research
of wideband phased-array transmitter design in mm-wave band 2 Liu YuFeng 2020 - present Design of Mm-wave Low Power
Transceiver for Wireless Communication 3. Piao Jiaming 2021 (Aug)- Present 5.9GHz DSRC-based SDR Transceiver 4 Zhou Haorong 2022 (Jan)- Present RF/mmW CMOS Amplifiers for 5G/6G Communications 5 Bai Yang 2023 (Aug)- Present mmW Receiver front-end 6 Geng Yifei 2023 (Aug)- Present mmW
Phase-Locked Loop 7. Bu Ran 2024 (Aug)- Present Integrated sensing and communication (ISAC) Receiver 8. Zhi Xie 2024 (Aug)- Present MMW PLL for Integrated sensing and communication (ISAC) Applications
Past PhD and Staff under my
Supervision (Incomplete list)
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