AWARDS
GRANTS
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PI:
Testing and Design on Advanced GaN Transmitter
MMICs Design Techniques for mmW Applications,
S$80,000.00 (in-kind), 12 January 2026 to 11 January 2030, Keysight Technologies, Singapore PI:
M25WTNG002 Advanced GaN Transmitter MMICs Design
Techniques for mmW Applications, S$599,980.00, 12 January
2026 to 11 January 2030, Agency for Science, Technology and Research (A*STAR) PI:
MOE AcRF T1 RG69/25 CMOS Adaptive Circuits for
All-In-Silicon Devices and System Toward High-Robust Terahertz Resonance and
Transmission, S$198,000.00, 01 November 2025 to 31 October 2028 PI:
Integrated Sensing and Communication RF Circuit Techniques, $1,007,495, 28
December 2023 to 27 December 2027, Industry. PI:
Terahertz-to-Imaging Integrated Circuit for Security and Health: MOE AcRF Tier 2/ CMOS (T2EP50123-0022), S$704,340, 1 February
2024 to 31 January 2028. PI:
Testing and design methodology on element design applicable for beyond-5G/6G
smart drone communication systems: Keysight Technologies Singapore (Sales),
S$900,000 (in-kind), 16 September 2022 to 15 August 2024, Keysight
Technologies Singapore (Industry). PI:
CMOS Terahertz Plasmonic Interconnect towards Tera-scale Computing, $788,736,
28 January 2020 to 27 January 2023, AcRF Tier 2
MOE, MOE2019-T2-1-114. PI:
Keysight Technologies Singapore – NTU Joint R&D: Transceiver test and
development applicable for V2X-System and mmW,
S$1,783.750 (including testing in-kind), 22 January 2020 to 21 January 2023,
Keysight Technologies Singapore (Industry). PI:
WP1: Transceiver Development Applicable for Hybrid “C-V2X+DSRC” V2X-System,
S$2,889.900, 1 November 2019 to 31 October 2022, A*STAR (STAT Board), SERC
A19D6a0053. PI:
LEES III-V + CMOS Circuits & System towards Commercialization, 1 July
2019 to 31 December 2021, LEES-SMART-IRG (SMART No. II-16 LEES IRG), Phase
II. PI:
Industry: Wireless Heterogeneous Network Transceiver Chipset for
Content-Driven Transmission of Learning Media (SLE-RP3) Research Area (SLE),
1st July 2016 to 30th June 2021. PI:
Monolithic Terahertz Passive Components in Advanced CMOS Technology: From
Fundamental Understandings to Integrated Circuit Applications, 1st November 2016 to
31st October 2018. PI:
Industry: Circuit Design for GaN Based DC-DC
Converter Power, 1st June 2016 to 31st December 2018.. Industry:
An Integrated Platform Approach Towards Non-Invasive Continuous Blood Glucose
Monitoring Addressing Clinical Need for Early Diagnosis and Improved
Compliance, 1st July 2016 to 30th July 2018. PI:
Industrial Grant (Fortune 500 Company) 10GiFi research & development of
ultra-wideband RF transceiver, S$927,840.00, 15th July 2014 to 14th July 201. PI: High
Thermal Resolution Ultra-Low Power Integrated Imager: Fund. Issues in CMOS,
$840,000, July 2013 to June 2016, AcRF Tier 2 MOE. PI:
Project 2: Electronic Circuit Design, Communication, S$391,560, April. 2012
to March 2013, LEES-SMART-IRG. PI: Project 2: Electronic Circuit
Design, Communication, S$376,200, April. 2013 to March 2014, LEES- SMART-IRG. Due to his excellent work and
performance, he was again awarded this subcontract. PI:
Project 2: Electronic Circuit Design, Communication, S$836,400, April. 2014
to March 2016, LEES-SMART-IRG. Recently,
due to the outstanding feedback on Jan 2014 LEES Annual Review Meeting, he
was further awarded a large subcontract amount of S$836,400 as PI under the
“Low Energy Electronic Systems” from April 2014 to March 2016. LEES Annual
Review Meeting is attended by all the PIs and Scientific Advisory Board (SAB)
members which include Prof. Timothy David Sands who was recently appointed as
President of Virginia Tech, USA. PI:
Ultra-low Power Fully Integrated CMOS 24GHz Receiver, $0.323mil, March 2008
to February 2011, AcRF Tier 1 MOE. PI: Batteryless Flexible Transceiver for Biomedical
Applications, $1,186,270 including scholarships), May 2009 to April 2012, AcRF Tier 2 MOE. Co-PI:
An Ultra Low-Power RFIC Chip For Wireless and
Communication Applications S$1.2 mil, March 2006 to February 2009, funded by
Agency for Science, Technology and Research (A*STAR). Co-PI:
System-on-chip: Realization of Software Radio, S$0.3 mil, 3 December 2008 to
2 December 2009, University of Electronic Science and Technology (UEST) of
China-NTU Joint R&D, jointly funded by UEST and NTU. Co-PI:
An Ultra Low-Power RF Transceiver Chip towards a New Paradigm of Life
Quality, S$0.25 mil, 3 December 2008 to 2 December 2009, NRF. Key
Collaborator: “Low Energy Electronic Systems” which has won the Singapore-MIT
Alliance for Research and Technology (SMART) International Research Grant
(IRG) proposal with a grant total of S$25million. Research
Interest · Below is the brief description of
my major research accomplishments and related papers: · (1) Green RFIC. · In this research, I recognized
that the rapid scaling of Si technology has brought the technology to the
point where various fundamental physical phenomena are beginning to impede
the path to further progress. One of the main problems is due to power dissipation
and the temperature rise associated with very high power
densities. An ultra-low power consumption transceiver makes sense as
transceiver is traditionally power hungry. In fact, power consumption relates
to the mobility, marketability, functionality and cost of a wireless device
(transceiver). It is obvious that the development of ultra-low power
consumption transceiver is of extreme importance. · An example of my work in this
area is the ultra low-power voltage-controlled
oscillator (VCO) design. In a conventional VCO design, high current is
injected into the circuit to achieve good phase noise performance which is
critical to the performance of a transceiver. However, high current will
result in high noise. Such kind of method is not ideal due to the high noise
and the high power consumption. To date, few VCOs
have met the specifications of the WCDMA and CDMA2000 standards due to the
stringent phase noise requirement. This is especially true for fully
integrated VCOs due to the low inductor Q. Based on the understanding of the
flicker noise generation in the MOSFET, a novel method for improving the
phase noise performance of a CMOS LC oscillator was investigated. An example
of a VCO that meets the system specifications of the WCDMA/CDMA2000 has been
achieved through this novel topology. This work was published in IEEE
Transaction year 2004 and has 37 citations (Google Scholar) so far [J3]. · Other related work done by his team
includes design of ultra-low power transceiver at sub-threshold region.
Design of sub-threshold region has been extensively implemented by watch
maker such that the small lithium battery in the watch can last for many
years without replacement. In fact, photovoltaic cell that is small enough to
be fitted into the front panel of a watch is popularly used to power the
watch. However, due to some fundamental limitations, sub-threshold region
circuits are mostly employed for low frequency applications like watches and
calculators and are often deemed unsuitable for high frequency RF circuits.
Through extensive studies on the RF circuits working at sub-threshold region,
we have successfully fabricated and tested a 2.45GHz RF circuit (LNA) working
at sub-threshold region. The circuit has achieved ultra-low power consumption
with good performance. This work by my part-time PhD student was published in
IEEE Transaction year 2008 [J8]. · Our group has later consolidated
the experience to successfully design an energy-aware IC chip that will
adjust its performance according to the amount of received signal strength
and will use the optimum power to receive the signal in a
given situation [published in J17, J22, C23, C24, C26]. This work
together with the idea of harvesting electromagnetic energy and converting it
to useful DC power have resulted in a new generation of ultra-low-power
System-on-Chips (SoCs) or "green" SoCs, with quantum leap for power
consumption. In other words, power consumption can be reduced to be more than
10 times less compared to conventional RFIC, which will greatly increase its
usefulness for daily usage. Thus, green electronics holds the promise as the
next generation electronics technology for computer communication and
consumer products, where energy-aware design and energy harvesting techniques
are part of the overall design considerations to achieve significant energy
savings and hence prolonging battery life. · We have been awarded several
competitive funding for this area of research: · • PI: $1,186,270, AcRF Tier 2 MOE. · • Co-PI: S$1.2 mil, funded by
Agency for Science, Technology and Research (A*STAR). · • Collaborator: S$25 mil,
funded by NRF. · Since 2008, we have published 16
International Journals (mostly in TOP tier), 25 IEEE conference papers, 1
book and 2 book chapters on this topic. · Some other highlights of these
works include: (1) 5mW energy-aware receiver with comparable performance to
those of 70mW conventional receiver. (2) High speed frequency divider that
consumes only 25% of the power of conventional frequency divider with the same
speed. (3) Smallest 60GHz and 77GHz dual-mode CMOS filter [0.1x0.56mm2] with
comparable performance to other larger CMOS filters. All these and more works
have been implemented using low cost CMOS 0.18µm
technology from local foundry. In addition, all these works have been
fabricated and tested physically. · · The research of mmW and RFIC will not be complete without thorough
investigation on its components modeling and its
related innovation. Currently a low performance RFIC transceiver chip can
cost as low as 25 US cents. However most RFIC chips
are not truly fully integrated, meaning external components are still needed
for the RFIC transceiver to work properly. Such external components can
easily cost 25 US cents thus doubling the cost of an RFIC transceiver. One of
the reasons for using external components like an inductor at RF frequency is
due to the low quality factor of integrated inductor
implemented in CMOS. Conventional quality factor for an integrated inductor
is about 4 to 10, while external inductor can achieved
100 times better quality factor. We have filed a patent together with our
industry partner, Chartered Semiconductor (now GlobalFoundries) on a new invention that will allow the quality factor of an
integrated inductor to achieve 1000 times higher than conventional inductor.
This work currently being pursued by my PhD student (Qiu Ping) [P1] is set to
revolutionize the RFIC industry. · Extensive work has been done on high speed interconnects, transformers, transistor’s modeling and characterization. Some of these works are
done in collaboration with GlobalFoundries. · We have been awarded several
competitive funding for this area of research: · • PI: $0.323mil, AcRF Tier 1 MOE. · • Co-PI: S$0.3 mil, University
of Electronic Science and Technology (UEST) of China-NTU Joint R&D,
jointly funded by UEST and NTU. · • Co-PI: S$0.25 mil, NRF. · Since 2008, we have published 8
International Journals (mostly in TOP tier), 5 IEEE conference papers and 1
book on this topic. |
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