T1.413 1998 issue2 supports STM and ATM transport. The following figure is a block diagram of an ADSL Transceiver Unit-Central office (ATU-C) transmitter showing the functional blocks and interfaces that are referenced in this standard for the downstream transport of STM data.
According to the ADSL standard specification, the diagrams are depicted following:
ADSL algorithms flow chart
SuperframingThis function block performs multiplexing, synchronization and necessary AOC and EOC overhead.
Input: Logic bearer channels: AS0~AS3, LS0~LS2 for downstream, LS0~LS2
for upstream connection.
Output: A DMT symbol, which is synchronized to the symbol rate 4KHz. The
symbol buffer is partitioned into two buffers; one for fast data and the other for
interleaved buffer.
The byte numbers of every bearer channel are designed at the connection initialization,
and they are fixed during the communication. For the simplest implementation, we may just
use AS0 for downstream (no LS stream), and LS0 for upstream. 68 data frames, followed with
one frame used for synchronization, construct a complete superframe.
Besides mux and sync control, the AOC and EOC overhead should be added in the function.
But they may be simplified for first time implementation
CRCThe CRC of superframe is just a reference for high level protocol, it’s no notable processing for the ADSL receiver. It just reports the decoding result to high level controller.
ScramblingAfter Mux/sync Control and CRC calculation, data from two paths enter their own scramblers. The scramblers make the data stream "whitened", ie, each data bit becomes practically independent from each other. ADSL T1.413 recommends the 23 stage register implementing this generating polynomial: G(x)=1+x-18+x-23. The scrambled data then is passed to RS FEC coding
RS CodingThe outer code for ADSL is RS coding. The length of the code and the message are determined during initialization; anyway it is a shortened code based on GF(256). For fast buffer, the message is composed of a single fast buffer; for interleaved buffer, the message maybe composed of several fast buffers.
Interleaving (interleaved path only)The depth of interleaving is decided during the initialization. For ADSL, convolutional interleaving is adopted.
Tone orderingAt this point, the whole DMT symbol is finished, usually it contains two data parts; one from fast data path, another from interleaved path. The whole number of bits (size) of the DMT symbol is determined by initialization.
The function of tone-ordering is re-ordering the bit-allocation table for each bin which is got during initialization. And then split the data bits from the DMT symbol buffer, assign them to each bin according to the re-ordered bit-allocation table. The available bins are determined by initialization. The maximal number of bins is 255. Anyway, the IFFT/FFT will adopt 2*256=512 complex points for downstream.
TCM/QAMTCM is an optional inner coding operation for ADSL. 4D-TCm coding is adopted. x+y-1 bits are extracted form the symbol buffer according to two consecutive b'(i), and after convolutional coding, x+y bits are prepared for 2 QAM signals constellation. And because of the table re-ordering, the 2 QAM symbols maybe not adjacent: they are ‘shuffled’ to provide more powerful performance.
For QAM modulation, one complex value can be mapped to the data bits of the bin. And the gain of each bin is determined by initialization.
For first time implementation, we may not adopt M-TCM, otherwise it will cost lots of MIPS of DSP for viterbi decoing. We can implement QAM at the first step, then we optimize the assembly code to adopt M-TCM.
IFFT/FFTTo get real output, conjugation of complex data from each bin is performed. So total 512 complex points IFFT/FFT for downstream is adopted. The 512 real outputs, together with 32 cyclic prefix, correspond to one DMT symbol. Fast algorithm can be used here. The computation complexity is associated with different kind of DSP chips.
EqualizationThe channel equalization is performed both in time-domain and frequency-domain. For time-domain equalization, FIR equalizer is adopted. The length of the FIR maybe ranged from 12 to 16. The coefficients of FIR are determined by initialization and fixed during transmission.
The frequency-domain equalization is simple one tap DFE, but it needs to be adaptive.
The equalizer, together with cyclic prefix added to one DMT block before DAC, can combat with channel impairment and noise to achieve powerful performance.
Initialization and TrainingActually this is the first step of the transmission link. All connection parameters
should be determined through some certain hand-shake protocols between the CO and RT
modems during this period. It includes:
The transport class specification (Number of bytes of each logic channel (ASi and LSi))
Code length and message length, interleaving depth.
Bit-allocation table b(i), and gain-control table g(i)
Channel estimation and equalizer FIR coefficients.
AGC of analog front-end.
Synchronization establishment.
A research group can be engaged in ADSL simulation. They may do the following components:
They can simulate the above algorithms by the following steps:
Actually, some of these algorithms maybe found from internet. We may use all available materials. They need to fully understand the algorithms they can get or they write them themselves, and use high-effective code to achieve highly efficient C6x code. This is very important for real-time implementation, since we want to achieve every algorithm in one chip.
Students involved algorithms simulation will:
