In-House Practical Training
Supervisors | Students | Abstract | Objectives | Scope | Methodology | Tasks | Management | Assessment | References
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Title
Virtual Semiconductor Device Fabrication and Characterisation

Supervisors

A/P Zhou Xing Phone: 790-4532, Office: S1-B1c-95, Email: exzhou@ntu.edu.sg
A/P Radhakrishnan K Phone: 790-4549, Office: S1-B1c-83, Email: eradha@ntu.edu.sg

Students

BOK CHUAN TZE NEO KER SIN
CHAN HSIEN HUNG NG TZE KIONG
CHUA EE LING REINIER YUDID LOPA
FIRMANSYAH LUASAN SAPUTRA SEETOH MUN WAI
HOY MEI LENG SEOW NING MIN
LAU SZE SZE SONNY NATALI
LIEW TECK SIEW WOO MENG KEE
MOHAMMAD HAFIZ BIN IMRAM

Abstract

In this project, students will be exposed to the state-of-the-art technology-CAD (TCAD) tools used by all wafer fab industries. Specifically, students will learn major wafer processing steps, such as diffusion, oxidation, ion implantation, as well as device electrical characterisation throught a simple (but real) example by virtually "fabricating" and "characterizing" a PN junction diode. Students will have a chance to visualize cross-sectional views of the device at various processing steps as well as device operations in terms of internal charge, field, current distributions and terminal I-V characteristics. The project will serve as a first-hand and a first-step towards the entrance to the fascinating world of deep-submicron semiconductor technology.

Objectives

  • Exposure to modern semiconductor fabrication processes and devices through a simple example
  • Practical experience in the state-of-the-art computer simulation tools to emulate simplified physical phenomena
  • Knowledge in design of experiment (DOE), modeling, and data analysis
  • Creativity and innovative ideas to nurture technopreneurship
  • Motivation and interest in the fascinating field of Microelectronics
    •

    Scope

  • Reading on general semiconductor processes and device characterization
  • Familiarization with the TCAD tools (such as DOE tool, process and device simulators)
  • Virtual Wafer Fabrication (VWF) — simulate the fabrication process of a simple junction diode
  • Virtual Device Characterization (VDC) — simulate the electrical (I-V) characteristics of the "fabricated" diode
  • Modeling — study on the target–variable dependency through numerical data interpolation and analytical equation (parameter extraction)
    •

    Methodology

  • Problem specification — decompose the complex electronic "system" to various levels of "abstraction" (or model, "mental image of reality")
  • Design conceptualization — identify the major target parameters and process variables
  • Design implementation — implement the design to obtain the required target–variable dependency
  • Numerical simulation — run process and device simulation
  • Data analysis — analyze and understand the simulated data
  • Physical modeling — extract physical model parameters from the simulated device
  • Application — extend the idea (simple diode example) to large scale integrated circuit design and fabrication
  • Documentation — summarize what has been achieved and demonstrate what could be done
    •

    Tasks

  • Study the basic diode equation and its I-V characteristics
  • Understand the basic process steps to fabricate the diode (such as implantation, diffusion, etc.)
  • Identify the design targets (turn-on voltage, leakage current, ideality factor) and variables (implant dose and energy, diffusion time and temperature, substrate doping)
  • Design and implement the experiment through DOE and numerical simulation
  • Obtain the target–variable relationship by graphical plots
  • Model the numerical data by physical equations through parameter extraction and nonlinear regression
  • Predict diode characteristics of new process conditions through numerical data interpolation and the analytical model
  • Generalize the approach to ULSI chip design and fabrication and demonstrate the potential impact (economical and technological) of the “virtual wafer fab” technology
  • Document the project and summarize the experience
    •

    Management

  • Self-motivated exploration through guided supervision
  • Team work through cooperation and healthy competition
  • Five groups, three students per group.  Rotating group leaders of the week, each student serving as the group leader for two weeks (for weeks 2~7)
  • Group leader is responsible for organisation and coordination of the group activities for the week, as well as liaison with the supervisors
  • Weekly oral presentations (Friday afternoons for the weeks 2~7, 20 min. plus 10 min. Q&A per group), headed by the group leader of the week.  Each student is expected to present (on average) 1 hour during IHPT.
  • Wining team will represent the class for Technopreneurship Competition (22 June)
  • Individual oral presentation of 5~10 min. (last week).
  • Written report (per group) at the end of the IHPT session (Due: 24 June)
    •

    Assessment

  • Attitude: motivation and enthusiasm
  • Aptitude: approach and participation
  • Altitude: understanding and creativity
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    References

    Relevant Links


    Last update: 1 July 2000
    X. Zhou