Research Collaborations

Division of Microelectronics

• Program Director, Computational Nano-Electronics Group, Center for Modeling and Control of Complex Systems

 
• Member, Silicon Technology Group

 
• Member, Nanoelectronics and Devices Group

• DSO
• PI, "Modelling of Light-activated PIN Diode," Mindef-NTU Joint Applied R&D Co-operation Program

• Atomistix Asia Pacific Ptd Ltd
• PI, "Bridging bottom-up atomic models with top-down compact modeling for future generation nanoelectronics circuit simulation"

• Semiconductor Research Corp.^®
• PI, "Technology-Based Predictive Compact Model Development for Next Generation CMOS"

• Chartered Semiconductor Manufacturing Ltd.
• Advanced MOSFET Noise Compact Modeling
• Development of Statistical Models for Baseband MOSFET Models
• Project DOUST: Design and Optimization of Ultra-Small Transistors
• Multi-Level Modeling of ULSI Systems in the Very-Deep-Submicron Technology Era
• LSI Logic Corporation
• Project DOUST: Design and Optimization of Ultra-Small Transistors

• Institute of High Performance Computing
• Co-PI, "A Joint Research (Virtual) Lab on Computational Nanoelectronics and Plasmonics Between  IHPC and NTU"
• Institute of Microelectronics
• Co-PI, "Ruggedized Electronics: SOI Model Validation and Characterization"
• Co-PI, "'GaN-on-Silicon' Thematic Strategic Research Programme: Device Characterization and Process-Design-Kit (PDK) Establishment"
• Supervisor, "Advanced MOSFET Noise Compact Modeling"
• PI, "Noise and NQS Compact Modeling for Scalable RF Nanometer CMOS," IME-NTU(EEE) JML
• Collaborator, "Compact modeling and characterization of sub-45nm active and passive CMOS devices," IME/NTU/NUS
• Supervisor, Nanoscale Strained-Si/SiGe MOSFET Modeling
• A*STAR SERC
• Collaborator, "Strategic Research Program on Nanoscience Initiative - Modelling and Self Assembly of Molecular Semiconductors for Nanoscale Electronic Integration," SIMT/IHPC/NUS/UIUC/Purdue/NTU

• Fudan University - School of Information Science and Engieering
• Tokyo Institute of Technology - Frontier Research Center
• Rice University - VISEN
• Institute for Sustainable Nanoelectronics
• Stanford University - CIS
• Project DOUST: Design and Optimization of Ultra-Small Transistors
• Indian Institute of Technology - Bombay
• DOUST/SEQUEL: MOSFET Compact Modeling (CM) and Look-Up Table (LUT) Circuit Simulation
• Hiroshima University - USDL
• Compact modeling for circuit simulation