Chapter:	Compact Modeling
Title:	Xsim: A Compact Model for Bridging Technology Developers and Circuit Designers
Author(s):	X. Zhou
Affiliation:	Nanyang Technological University, Singapore
Pages:	710 - 714
Keywords:	compact model, deep-submicron MOSFETs, parameter extraction, technology development, circuit simulation
Abstract:	This paper describes the ideas and philosophy behind a new compact model (CM) for deep-submicron MOSFETs, called Xsim, which has been developed from scratch over the past few years. Similarities to and differences from existing popular models are pointed out. The opinions on many controversial debates in the CM field are given. The ultimate goal of the CM development in the context of technology/circuit modeling and optimization is outlined.
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ISBN:	0-9708275-7-1

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© 2002 Computational Publications Boston * Geneva * San Francisco www.comppub.com In association with
Applied Computational Research Society www.cr.org	Nano Science and Technology Institute www.nsti.org

Chapter:	Compact Modeling
Title:	Compact Model for Manufacturing Design and Fluctuation Study
Author(s):	K.Y. Lim and X. Zhou
Affiliation:	Chartered Semiconductor Manufacturing Ltd., Singapore
Pages:	746 - 749
Keywords:	compact model, semiconductor process variability, fluctuation and sensitivity study, in-line device parameters and end-of-line ET parameters
Abstract:	In this article, a physics based compact model [1, 2] has been used as a tool for manufacturing process variability study. Three critical end-of-line (EOL) measured electrical testing (ET) parameters, namely Vth, Ion and Ioff, of a 0.25mm CMOS technology together with three in-line device parameters (tox, Leff, Ns) are used for the study. Based on the compact model, the sensitivity of each EOL parameter with respect to individual in-line device parameter can be easily computed. To systematically examine the correlation of final electrical parameters with the fluctuation of in-line device parameter directly related to process, a mathematical model that expresses ET parameter variance in terms of process-related parameter variance [3] has been employed. By combining the above mathematical model and sensitivity rate calculated from calibrated compact model together with computed normalized variance from actual experimental data, the device parameter fluctuation can be derived from measured ET fluctuation.
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ISBN:	0-9708275-7-1

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© 2002 Computational Publications Boston * Geneva * San Francisco www.comppub.com In association with
Applied Computational Research Society www.cr.org	Nano Science and Technology Institute www.nsti.org

Chapter:	Compact Modeling
Title:	Physically-Based Approach to Deep-Submicron MOSFET Compact Model Parameter Extraction
Author(s):	S.B. Chiah, X. Zhou, K.Y. Lim, A. See and L. Chan
Affiliation:	Nanyang Technological University, Singapore
Pages:	750 - 753
Keywords:	deep-submicron MOSFET, compact model, parameter extraction, nonlinear regression, optimization
Abstract:	This paper demonstrates a physically-based approach to parameter extraction of the compact Ids model we have developed for deep-submicron technology development. A two-iteration parameter-extraction scheme is described, which improves the previous one-iteration approach. Parameter calibration for the Vt model is revisited. Comparison of parabolic and linear body-bias dependency with new calibration sequence for the Vt model is carried out, which shows higher accuracy in Vt modeling for the new parabolic interpolation. Optimization for the halo pileup centriod, LDD lateral diffusion as well as saturation velocity is carried out to improve the overall Vt and Ids modeling. This has been verified with the experimental data from a 0.18-µm CMOS technology wafer.
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ISBN:	0-9708275-7-1

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© 2002 Computational Publications Boston * Geneva * San Francisco www.comppub.com In association with
Applied Computational Research Society www.cr.org	Nano Science and Technology Institute www.nsti.org

Title:	Semi-Empirical Approach to Modeling Reverse Short-Channel Effect in Submicron MOSFET's
Authors:	S.B. Chiah, X. Zhou, K.Y. Lim, Y. Wang, A. See, and L. Chan
Affiliation:	Nanyang Technological University
Keywords:	Reverse short-channel effect, effective channel doping, pile-up charge centroid, submicron MOSFET
Abstract:	A model for effective channel doping in submicron LDD nMOSFET's is presented by adding the effect of the lateral nonuniform pile-up charge centroid to the Gaussian profile with peak doping near the edge of the metallurgical channel. The effect of the pile-up centroid on the threshold voltage parameter extraction is elaborated, from which semi-empirical relationships on all fitting parameters are formulated. Threshold voltage versus gate length data from MEDICI-simulated devices with lateral Gaussian pile-up doping profiles are used for the verification of this model.
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Title:	Experimental Determination of Electrical, Metallurgical, and Physical Gate Lengths of Submicron MOSFET's
Authors:	X. Zhou and K.Y. Lim
Affiliation:	Nanyang Technological University
Keywords:	effective channel length, metallurgical channel length, LDD lateral diffusion, critical-dimension correction, critical-current at linear-threshold, MOSFET
Abstract:	A simple, empirically-based method is developed for extraction of submicron surface-channel MOSFET's effective channel length (Leff) with critical-dimension correction to poly-gate length (Lg) and correlation to metallurgical channel length (Lmet). A self-consistent compact model for the lightly-doped drain (LDD) lateral diffusion is proposed, which can be correlated to the extracted Leff. The combined experimental determination of Leff, Lmet, and Lg further validates the proposed "critical-current at linear-threshold" ("Icrit@Vt0") Leff-extraction method, and provides important applications in statistical process control and monitoring as well as deep-submicron (DSM) technology characterization and device modeling.
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Title:	A Novel Approach to Compact I-V Modeling for Deep-Submicron MOSFET's Technology Development and Circuit Simulation
Author(s):	X. Zhou and K.Y. Lim
Affiliation:	Nanyang Technological University
Keywords:	MOSFET, compact model, de-embed, parameter extraction, process correlation
Abstract:	This paper presents a novel approach to formulating compact I-V models for deep-submicron MOS technology development. The developed model is a one-region closed-form equation that resembles the same form as the long-channel one, which covers full range of channel length and bias conditions. Model parameter extraction follows a one-iteration prioritized sequence with minimum measurement data, and can be correlated to process variables.
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Title:	Modeling of Threshold Voltage with Reverse Short Channel Effect
Author(s):	K.Y. Lim, X. Zhou and Y. Wang
Affiliation:	Nanyang Technological University
Keywords:	RSCE, lateral non-uniform profile, threshold voltage, compact model, MOSFET
Abstract:	This paper presents a new reverse short channel effect (RSCE) model for threshold voltage modeling of submicrometer MOSFETs. Unlike those conventional empirically-based RSCE models, the proposed model is derived and simplified based on two Gaussian profiles to simulate boron pile-up at the source and drain edges of nMOS devices. The model has a simple compact form that can be utilized to study and characterize the pile-up profile of advanced halo-implant MOSFETs. The analytical model has been applied to, and verified with, experimental data of a 0.25-mm CMOS process for various channel length and substrate bias conditions.
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Title:	A Velocity-Overshoot Subthreshold Current Model for Deep-Submicrometer MOSFET Devices
Author(s):	W. Qian, X. Zhou, Y. Wang, and K.Y. Lim
Affiliation:	Nanyang Technological University
Keywords:	velocity-overshoot subthreshold current model, deep-submicron MOSFET devices
Abstract:	In this paper, a new theoretical approach to submicrometer MOSFET subthreshold current modeling is presented. The diffusion and drift currents are calculated, respectively. The effect of velocity overshoot on subthreshold current is investigated. Comparison with MEDICI simulation results verifies the model.
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Title:	A Predictive Length-Dependent Saturation Current Model Based on Accurate Threshold Voltage Modeling
Author(s):	K.Y. Lim, X. Zhou and D. Lim
Affiliation:	Nanyang Technological University
Keywords:	Saturation current, threshold voltage, short-channel effect, compact modeling, process correlation
Abstract:	This paper presents a compact length-dependent saturation current (Idsat) model for deep-submicron MOSFETs based on accurate modeling of the threshold voltabe (Vth). The proposed unified model has considered all the important two-dimensional (2-D) short-channel effects, such as Vth roll-up and roll-off, drain induced barrier lowering (DIBL), transverse-field mobility degradation and series resistance. The unique feature of the compact model is its ability to correlate to process variations such as implantation dose and energy. The model is verified with measured Idsat data for various bias conditions and process splt-run.
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