A Physically-Based Semi-Empirical Series Resistance Model for Deep-Submicron MOSFET I-V Modeling

Khee Yong Lim, Student Member, IEEE and Xing Zhou, Senior Member, IEEE

Figures

Fig. 1 | Fig. 2 | Fig. 3 | Fig. 4

Fig-1

Fig. 1 Two interpretations of the effective voltage drop across the intrinsic Rint (solid circle and open square) versus drawn gate length. The actual voltage drop across Rint (open circle) and Rext (open triangle). The inset shows the schematic view of a MOSFET with various defined parameters.

Fig-2

Fig. 2 Measured (symbol) and modeled (line) linear Ids - Vgs curves of the 0.2-µm device. Only one I-V data (solid circle) is used for parameter extraction.

Fig-3

Fig. 3 Measured (symbol) and predicted (line) Ids - Vgs for different gate length as indicated.

Fig-4

Fig. 4 Series resistance (left axis) and drain current (right axis) versus gate voltage based on the extracted model parameters (solid line) and variations in xj (dotted line) and S (dashed line).