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Multi-Level Modeling of Deep-Submicron CMOS ULSI SystemsAbstract
The trends and needs in multi-level modeling of ULSI systems are reviewed in the context of deep-submicron CMOS technology. A dual-representation of transistors/circuits is proposed and demonstrated through physics-based compact modeling and single-engine circuit simulator based on subcircuit expansion. Extension to process correlation and block-level representation is also proposed, which will be the key to studying process effects on system performance. This consistent dual-representation allows detailed physics captured at a lower level to be propagated to the higher level of abstraction.