Nanowires formation for nanoelectronic applications

I-10: Nanowires Formation for Nanoelectronic Applications

Asst. Prof. Gan Chee Lip (SME)

Co-Authors:
Hong Minghui (DSI),
Ong Teng San (DSI),
Law Hwee Ming (NTU),
Wong Chee Cheong (NTU),
Lee Pooi See (NTU),
Alfred Tok (NTU),
Ma Jan (NTU)

Abstract

As the minimum dimension of devices continues to scale into the nanometer regime, present photolithography technology of patterning devices onto silicon wafers will be reaching its limit. A possible solution is to fabricate nanowires, which function as devices and/or interconnects, from the bottoms-up method.

GaO nanowires of less than 50nm diameter have been obtained using the Pulsed Laser Deposition (PLD) method. PLD of rare earth silicides nanowires are also being explored for semiconductor applications. In addition, metallic nanowires fabricated using anodized alumina template method is being explored for application in both on-chip and off-chip interconnects.