Sudha Natarajan

 

Assistant Professor

School of Computer Engineering
 

 

Sudha Natarajan received her B.E degree from Madurai Kamaraj University, India in 1992, M.S from Indian Institute of Technology (IIT) Madras in 1997 and Ph.D from IIT Guwahati in 2001. She was a Senior Lecturer at IIT Guwahati from December 1999 to July 2000. From October 2000 to December 2001, she worked as a Post-Doctoral Fellow at Center for High Performance Embedded Systems (CHiPES) in Nanyang Technological University, Singapore. She was employed as a Principal Project Officer  at IIT Madras from March 2002 to March 2003. She then served as an Assistant Professor in the Department of Computer Science & Engineering of IIT Madras till December 2005. She is currently working as an Assistant Professor in the School of Computer Engineering, Nanyang Technological University, Singapore. Her research areas  include  Computer Vision and Image Processing, Biometrics, Embedded Systems and Neural Networks. She has published about 50 technical papers in International Journals and Conferences. She is the Principal Investigator for 3 sponsored research projects. She is a Senior Member of IEEE.

 

 

 

PUBLICATIONS

 

Refereed Journals:

 

 

1.      N.B. Puhan, N. Sudha and S.K. Anirudh, “Efficient Segmentation Technique for Noisy Frontal View Iris Images Using Fourier Spectral Density”, to appear in Signal, Image and Video Processing, Springer.

2.      N. Sudha, N.B. Puhan, Hua Xia and Jiang Xudong, “Iris Recognition on Edge Maps”, IET Computer Vision, Vol. 3, No. 1, pp. 1-7, Mar 2009.

3.      N. Sudha and N.B. Puhan, “Comparing Noisy Irises Using a Modified Partial Hausdorff Distance”, International Journal of Automated Identification Technology, Serials Publications, Vol. 1, No. 1, pp. 23-30, June 2008

4.      N. Sudha and A.R. Mohan, “Design of a hardware accelerator for path planning on the Euclidean distance transform”,  Journal of Systems Architecture, Elsevier, Vol. 54, No. 1-2, pp. 253-264, January-February 2008. 

5.      N. Sudha, CH. Siva Sai Prasanna and V. Kamakoti, “An efficient digital architecture for principal component neural network and its FPGA implementation”,  IETE Journal of Research, Vol.53, No.5, pp.425-432, 2007.

6.      E.P. Vivek and N. Sudha, “Robust Hausdorff distance measure for face recognition",  Pattern Recognition, Elsevier, Vol. 40, No. 2, pp. 431-442, February 2007.

7.      E.P. Vivek and N. Sudha, “Gray Hausdorff distance measure for comparing face images", IEEE Transactions on Information, Forensics and Security, Vol. 1, No. 3, pp. 342-349, September 2006.

8.      N. Sudha, “A pipelined array architecture for Euclidean distance transformation and its FPGA implementation",Microprocessors and Microsystems Journal, Elsevier, Vol. 29, pp. 405-410, 2005.

9.      N. Sudha and K. Sridharan, “A high-speed VLSI design and ASIC implementation for constructing Euclidean-distance based discrete Voronoi diagram",  IEEE Transactions on Robotics and Automation, Vol. 20, No. 2, pp. 352-358, April 2004.

10.  N. Sudha, “An ASIC implementation of Kohonen's map based color image compression",  Real Time Imaging, Elsevier, Vol. 10, Issue 1, pp. 31-39, February 2004.

11.  N. Sudha, “Design of a cellular architecture for fast computation of the skeleton",  Journal of VLSI Signal Processing, Kluwer Academic, Vol. 35, Issue 1, pp. 61-73, August 2003.

12.  N. Sudha, T. Srikanthan and Babu Mailachalam, “A VLSI architecture for 3-D self-organizing map based color quantization and its FPGA implementation", Journal of Systems Architecture, Elsevier, Vol. 48, Issue 11-12, pp.337-352, April 2003.

13.  N. Sudha, S. Nandi and K. Sridharan, “A cellular architecture for Euclidean distance transformation",  IEE  Proceedings - Computers and Digital Techniques, Vol. 147, No. 5, pp.335-342, September 2000.

14.  K. Sridharan, C.R. Subramanian and N. Sudha, “Some properties of touching distances for polygons and polyhedra", Applied Mathematics Letters, Pergamon, Vol.11, No.5, pp.1-7, 1998.

 

 

Book Chapter:

 

  1. N. Sudha and A. R. Mohan, “Vision-based path planning with onboard VLSI array processors”, Chapter 8, New Research on Mobile Robotics, Editors: Ernest V. Gaines and Lawrence W. Peskov, ISBN 978-1-60456-651-2, Nova Science Publishers, USA, July 2008.
  2. N. Sudha and A.R. Mohan, "A Cellular Array VLSI Arhitecture for Vision-Based Navigation of Mobile Robots", Chapter 7, VLSI and Computer Architecture, Editor: Kenzo Watanabe, ISBN 978-1-60692-075-6, Nova Science Publishers, USA, 2008 (4th quarter).

 

 

Refereed Conferences:

 

  1. Fahad Hameed Ahmad, N. Sudha, “Deformable rigid body Hausdorff registration for multi-modal medical images”, Proceedings of IEEE TENCON, Singapore, Nov. 2009.

2.  Mohan A.R., N. Sudha, “Fast face detection using boosted eigenfaces”, Proceedings of IEEE International Symposium on Industrial Electronics and Applications,  Kuala Lumpur, Malaysia, Oct 2009.

3.  Mohan A.R., N. Sudha, “Hardware directed Fast Eigenface based face detection algorithm using FFT”, Proceedings of IEEE International Symposium on Industrial Electronics,  Seoul, Korea, July 2009.

4.  N. Sudha, Mohan A.R, “A Vision-Based Path Planning on a Distance Map and its Cellular Array VLSI Architecture”, Proceedings of IEEE International Symposium on Industrial Electronics,  Seoul, Korea, July 2009.

5.  Mohan A.R., N. Sudha and Pramod K. Meher, “An embedded face recognition system on a VLSI array architecture and its FPGA implementation”, Proceedings of 34th Annual Conference of the IEEE Industrial Electronics Society, pp. 2432-2437, Orlando, USA, Nov 2008.

6.  Puhan N.B., N. Sudha, “Efficient Feature Matching in a Very Large Iris Database for Person Identification”, Proceedings of 34th Annual Conference of the IEEE Industrial Electronics Society, pp. 1881-1884, Orlando, USA, Nov 2008.

7.  N.B. Puhan and N. Sudha, "A novel iris database indexing method using the iris color", Proceedings of the IEEE International Conference on Industrial Electronics and Applications, Singapore, June 2008.

8.  N. Sudha, A.R. Mohan and Pramod K. Meher, "Systolic array realization of a neural network-based face recognition system", Proceedings of the IEEE International Conference on Industrial Electronics and Applications, Singapore, June 2008.

9.  N.B. Puhan, N. Sudha and Xudong Jiang, “Robust Eyeball Segmentation in Noisy Iris Images Using Fourier Spectral Density”, Proceedings of IEEE International Conference on Information, Communications and Signal Processing, Singapore, Dec 2007.

 

10.  N. Sudha and Kenny Wong Yung Ho, “A new method for iris recognition using Hausdorff distance”, Proceedings of  IEEE Multi-Conference on Systems and Control, Singapore, October 1-3, 2007.

11.  N. Sudha, “Design of a hardware accelerator for path planning on the Euclidean distance transform”, Proceedings of  IEEE Multi-Conference on Systems and Control, Singapore, October 1-3, 2007.

12.  N. Sudha and Graham Leedham, “Multiprocessor System-On-Chip For Real-Time Identification of Human Faces”,  Microelectronics and Embedded Systems Workshop, Singapore, January 2007.

13.  E.P. Vivek and N. Sudha, “Robust Hausdorff Distance Measure for Face Recognition",  Proceedings of the Thirteenth International Conference on Advanced Computing and Communications, pp. 142-147, Coimbatore, India, Dec. 2005.

14.  N. Sudha and E.P. Vivek, “A  High-Speed VLSI Array Architecture for Euclidean Metric-Based Hausdorff Distance Measures Between Images", Proceedings of the International Conference on High Performance Computing (LNCS 3769), pp. 180-189, Goa, India, Dec. 2005.

15.  E.P. Vivek and N. Sudha, “Gray Hausdorff Distance Measures for Comparing Face Images",  Proceedings of the 2nd Indian International Conference on Artificial Intelligence, Pune, India, pp. 3103-3114, Dec. 2005.

16.  CH. Siva Sai Prasanna, N. Sudha, V. Kamakoti, “A principal component neural network-based face recognition system and its ASIC implementation", Proceedings of the 18th International Conference on VLSI Design (sponsored by IEEE Computer Society),  pp. 795-798, Calcutta, India, Jan. 2005.

17.  CH. Siva Sai Prasanna, N. Sudha, V. Kamakoti, “A hardware-directed face recognition system based on local eigen analysis with PCNN”, Proceedings of the 11th International Conference on Neural Information Processing (LNCS 3316), pp. 327-332, Calcutta, India, Nov. 2004.

18.  R. Suguna, N. Sudha and C. Chandra Sekhar, “A fast and efficient face detection technique using Support Vector Machine",  Proceedings of the 11th International Conference on Neural Information Processing (LNCS 3316), pp. 338-343, Calcutta, India, Nov. 2004.

19.  N. Sudha, “An area-efficient pipelined array architecture for Euclidean distance transform and its FPGA implementation", Proceedings of Seventeenth International Conference on VLSI design (Sponsored by IEEE Computer Society), pages 689-692, Mumbai, India, Jan 2004.

20.  N. Sudha, “An ASIC implementation of Kohonen's map based color image compression", Proceedings of Seventeenth International Conference on VLSI design (Sponsored by IEEE Computer Society),  pages 677-680, Mumbai, India, Jan 2004.

21.  Durgesh Kumar Kannojia, N. Sudha and S. Srinivasan, “An Area-Efficient VLSI Architecture for Principal Component Neural Network and Its Applications to Biometric Signal Processing", Proceedings of National Conference on Advanced Machine Vision Systems for Societal Applications, Chennai, India,  pp. 233 - 237, Dec. 2003.  

22.  P. Rajesh Kumar, N. Sudha, S. Srinivasan and K. Sridharan, “A pipelined cellular architecture for Euclidean distance transform",  Proceedings of IEEE TENCON, pp. 1153-1156, Bangalore, Oct. 2003.

23.  K. Sridharan and N. Sudha, “Computation of Hausdorff distance with applications to collision prediction and character recognition", Proceedings of Sixth International Conference on High Performance Computing in Asia-Pacific Region (HPC ASIA 2002), pp. 339-342, Bangalore, India, Dec. 2002.

24.  N. Sudha, T. Srikanthan and B. Mailachalam, "Implementing 3-D self organizing map-based color quantization process in FPGA", Proceedings of Ninth International Conference on Advanced Computing and Communications (ADCOM), pp.  223-230, Bhubaneswar, Dec. 2001.

25.  N. Sudha, T. Srikanthan and B. Mailachalam, "A VLSI implementation of 3-D self organizing map for applications in color image processing",  Proceedings of ICICS 2001, Singapore, Oct. 2001.

26.  K. Sridharan, Shi Jian, N. Sudha and T. Srikanthan, “Efficient computation of a similarity measure for Chinese character recognition”, Proceedings of ICICS 2001, Singapore, Oct. 2001.

27.  N. Sudha, S. Nandi and K. Sridharan, “A parallel algorithm for the construction of Voronoi diagram and its VLSI architecture",  Proceedings of the 1999 IEEE International Conference on Robotics and Automation, pp 1683-1688, Detroit, USA, May 10-15, 1999.

28.  N. Sudha and S. Nandi, “A parallel skeletonization algorithm and its VLSI architecture",  Proceedings of the fifth International Conference on High Performance Computing (HiPC'98), pp 65-72, Chennai,India, Dec. 1998.

29.  N. Sudha, S. Nandi, P.K. Bora and K. Sridharan, “Efficient computation of Euclidean distance transformation for applications in image processing", Proceedings of the IEEE Region Ten Conference on Global Connectivity in Energy, Computer, Communication and Control (TENCON'98), Vol. 1, pp. 49-52, Delhi, India, Dec. 1998.

30.  K. Sridharan, C.R. Subramanian and N. Sudha, “Properties of touching distances between planar objects", Proceedings of the International Symposium on Intelligent Robotic Systems, pp 283-290, Bangalore, India, Jan. 1998.

31.  N. Sudha, C. Chandra Sekhar and B. Yegnanarayana, “A neural network based approach for classification of underwater vessels", Symposium on Ocean Electronics, pp. 99-103, Cochin University, Cochin, India, Dec. 1995.

 

 

 

 

SPONSORED RESEARCH PROJECTS

 

1.    Project title: Design of efficient techniques for iris recognition.

       Funding agency: InfoComm research cluster grant

      Period: Oct 2006 – Mar 2008 at NTU Singapore

    

2.    Project title: VLSI-efficient algorithms and architectures for real-time face recognition in biometric-based security systems.

       Funding agency: Academic Research Fund (Tier 1), Ministry of Education

      Period: Nov 2006 – Nov 2009 at NTU Singapore

    

3.    Project title: VLSI architectures for biometric processing with a principal component neural network

       Funding agency: Department of Science and Technology, Govt. of India

       Period: Mar 2004 – Mar 2006 at Indian Institute of Technology Madras